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max_uart_vhdl
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Maximilian Stiefel 6c1005a6af
Renamed all VHDL files 		4 years ago
.gitignore Got simple example working with gtkwave 4 years ago
LICENSE Initial commit 4 years ago
README.md Initial commit 4 years ago
clock_divider.vhd Renamed all VHDL files 4 years ago
clock_divider_tb.vhd Renamed all VHDL files 4 years ago
string_sender.gtkw Top design for UART hello_world seems to work 4 years ago
string_sender.vhd Renamed all VHDL files 4 years ago
string_sender_tb.vhd Renamed all VHDL files 4 years ago
top.gtkw Top design for UART hello_world seems to work 4 years ago
top.vhd Renamed all VHDL files 4 years ago
top_tb.vhd Renamed all VHDL files 4 years ago
uart_tx.gtkw UART TX module works. 4 years ago
uart_tx.pcf Added .pcf file 4 years ago
uart_tx.vhd Renamed all VHDL files 4 years ago
uart_tx_tb.vhd Renamed all VHDL files 4 years ago

README.md

vga_uart_grabber_vhdl