Small changes on the backplane standing out.

pcbs/analog_board_v0.2/Photodiodes.pretty/BPW34FA_w_Silks.kicad_mod

@@ -0,0 +1,10 @@
+(module BPW34FA_w_Silks (layer F.Cu) (tedit 595B5503)
+  (fp_text reference D1 (at 0 3.048) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value BPW34 (at 0 -3.81) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (pad 1 thru_hole circle (at -2.5 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
+  (pad 2 thru_hole circle (at 2.5 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
+)

pcbs/analog_board_v0.2/Vias.pretty/Stitchging-Via-0.4-0.7.kicad_mod

@@ -1,8 +1,8 @@
-(module Stitchging-Via-0.4-0.7 (layer F.Cu) (tedit 5941646D)
+(module Stitchging-Via-0.4-0.7 (layer F.Cu) (tedit 595B6248)
   (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
     (effects (font (size 1 1) (thickness 0.15)))
   )
-  (fp_text value Stitching-Via-0.5-0.7 (at 0 -1.27) (layer F.Fab)
+  (fp_text value Stitching-Via-0.4-0.7 (at 0 -1.27) (layer F.Fab)
     (effects (font (size 1 1) (thickness 0.15)))
   )
   (pad 1 thru_hole circle (at 0 0) (size 0.7 0.7) (drill 0.4) (layers *.Cu)

pcbs/analog_board_v0.2/WithoutSilkscreen.pretty/R_0805_W_Silks.kicad_mod

@@ -0,0 +1,29 @@
+(module R_0805_W_Silks (layer F.Cu) (tedit 595B66DE)
+  (descr "Resistor SMD 0805, reflow soldering, Vishay (see dcrcw.pdf)")
+  (tags "resistor 0805")
+  (attr smd)
+  (fp_text reference R1 (at -1.697 -1.952 90) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value 10G (at 0 1.75) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text user %R (at 0 -1.65) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_line (start -1 0.62) (end -1 -0.62) (layer F.Fab) (width 0.1))
+  (fp_line (start 1 0.62) (end -1 0.62) (layer F.Fab) (width 0.1))
+  (fp_line (start 1 -0.62) (end 1 0.62) (layer F.Fab) (width 0.1))
+  (fp_line (start -1 -0.62) (end 1 -0.62) (layer F.Fab) (width 0.1))
+  (fp_line (start -1.55 -0.9) (end 1.55 -0.9) (layer F.CrtYd) (width 0.05))
+  (fp_line (start -1.55 -0.9) (end -1.55 0.9) (layer F.CrtYd) (width 0.05))
+  (fp_line (start 1.55 0.9) (end 1.55 -0.9) (layer F.CrtYd) (width 0.05))
+  (fp_line (start 1.55 0.9) (end -1.55 0.9) (layer F.CrtYd) (width 0.05))
+  (pad 1 smd rect (at -0.95 0) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask))
+  (pad 2 smd rect (at 0.95 0) (size 0.7 1.3) (layers F.Cu F.Paste F.Mask))
+  (model Resistors_SMD.3dshapes/R_0805.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 1 1 1))
+    (rotate (xyz 0 0 0))
+  )
+)

pcbs/analog_board_v0.2/WithoutSilkscreen.pretty/SOIC-8-N-W-Silks.kicad_mod

@@ -0,0 +1,24 @@
+(module SOIC-8-N-W-Silks (layer F.Cu) (tedit 595B7897)
+  (descr "Module Narrow CMS SOJ 8 pins large")
+  (tags "CMS SOJ")
+  (attr smd)
+  (fp_text reference U1 (at 3.348 -1.604 90) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value ADA4530-1 (at 0 1.27) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (pad 8 smd rect (at -1.905 -3.175) (size 0.508 1.143) (layers F.Cu F.Paste F.Mask))
+  (pad 7 smd rect (at -0.635 -3.175) (size 0.508 1.143) (layers F.Cu F.Paste F.Mask))
+  (pad 6 smd rect (at 0.635 -3.175) (size 0.508 1.143) (layers F.Cu F.Paste F.Mask))
+  (pad 5 smd rect (at 1.905 -3.175) (size 0.508 1.143) (layers F.Cu F.Paste F.Mask))
+  (pad 4 smd rect (at 1.905 3.175) (size 0.508 1.143) (layers F.Cu F.Paste F.Mask))
+  (pad 3 smd rect (at 0.635 3.175) (size 0.508 1.143) (layers F.Cu F.Paste F.Mask))
+  (pad 2 smd rect (at -0.635 3.175) (size 0.508 1.143) (layers F.Cu F.Paste F.Mask))
+  (pad 1 smd rect (at -1.905 3.175) (size 0.508 1.143) (layers F.Cu F.Paste F.Mask))
+  (model SMD_Packages.3dshapes/SOIC-8-N.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 0.5 0.38 0.5))
+    (rotate (xyz 0 0 0))
+  )
+)

pcbs/analog_board_v0.2/analog_board_v0.2.bak

@@ -146,10 +146,10 @@ Wire Wire Line
 Wire Wire Line
 	6525 3575 7675 3575
 $Comp
-L TEST TP2
+L TEST I2C1
 U 1 1 59577F16
 P 6800 3725
-F 0 "TP2" H 6800 4025 50  0000 C BNN
+F 0 "I2C1" H 6800 4025 50  0000 C BNN
 F 1 "TEST" H 6800 3975 50  0000 C CNN
 F 2 "Tespoints:TP_SMD_quadr_1mm" H 6800 3725 50  0001 C CNN
 F 3 "" H 6800 3725 50  0001 C CNN
@@ -157,10 +157,10 @@ F 3 "" H 6800 3725 50  0001 C CNN
 	0    1    1    0   
 $EndComp
 $Comp
-L TEST TP3
+L TEST I2C2
 U 1 1 59578158
 P 6800 3950
-F 0 "TP3" H 6800 4250 50  0000 C BNN
+F 0 "I2C2" H 6800 4250 50  0000 C BNN
 F 1 "TEST" H 6800 4200 50  0000 C CNN
 F 2 "Tespoints:TP_SMD_quadr_1mm" H 6800 3950 50  0001 C CNN
 F 3 "" H 6800 3950 50  0001 C CNN
@@ -180,7 +180,7 @@ L TEST TP1
 U 1 1 5957A021
 P 6800 3125
 F 0 "TP1" H 6800 3425 50  0000 C BNN
-F 1 "TEST" H 6800 3375 50  0000 C CNN
+F 1 "DAC2" H 6800 3375 50  0000 C CNN
 F 2 "Tespoints:TP_SMD_quadr_1mm" H 6800 3125 50  0001 C CNN
 F 3 "" H 6800 3125 50  0001 C CNN
 	1    6800 3125

pcbs/analog_board_v0.2/analog_board_v0.2.net

@@ -1,7 +1,7 @@
 (export (version D)
   (design
     (source /home/maximilian/UppSense/pcbs/analog_board_v0.2/analog_board_v0.2.sch)
-    (date "mån  3 jul 2017 13:59:20")
+    (date "tis  4 jul 2017 13:16:08")
     (tool "Eeschema 4.0.6-e0-6349~52~ubuntu17.04.1")
     (sheet (number 1) (name /) (tstamps /)
       (title_block
@@ -48,27 +48,27 @@
         (comment (number 3) (value ""))
         (comment (number 4) (value "")))))
   (components
-    (comp (ref TP2)
+    (comp (ref I2C1)
       (value TEST)
       (footprint Tespoints:TP_SMD_quadr_1mm)
       (libsource (lib device) (part TEST))
       (sheetpath (names /) (tstamps /))
       (tstamp 59577F16))
-    (comp (ref TP3)
+    (comp (ref I2C2)
       (value TEST)
       (footprint Tespoints:TP_SMD_quadr_1mm)
       (libsource (lib device) (part TEST))
       (sheetpath (names /) (tstamps /))
       (tstamp 59578158))
     (comp (ref TP1)
-      (value TEST)
+      (value DAC2)
       (footprint Tespoints:TP_SMD_quadr_1mm)
       (libsource (lib device) (part TEST))
       (sheetpath (names /) (tstamps /))
       (tstamp 5957A021))
     (comp (ref D1)
       (value BPW34)
-      (footprint Photodiodes:BPW34FA)
+      (footprint Photodiodes:BPW34FA_w_Silks)
       (datasheet http://www.farnell.com/datasheets/2046123.pdf)
       (fields
         (field (name Farnell) 1045425))
@@ -85,7 +85,7 @@
       (tstamp 5941B3D6))
     (comp (ref U1)
       (value ADA4530-1)
-      (footprint SMD_Packages:SOIC-8-N)
+      (footprint WithoutSilkscreen:SOIC-8-N-W-Silks)
       (datasheet http://www.farnell.com/datasheets/2008040.pdf)
       (fields
         (field (name Franell) 2521248))
@@ -94,7 +94,7 @@
       (tstamp 5957CE13))
     (comp (ref R1)
       (value 10G)
-      (footprint Resistors_SMD:R_0805)
+      (footprint WithoutSilkscreen:R_0805_W_Silks)
       (datasheet http://www.farnell.com/datasheets/1928778.pdf)
       (fields
         (field (name Farnell) 2420577))
@@ -396,7 +396,7 @@
       (libsource (lib conn) (part CONN_01X03))
       (sheetpath (names /highCurrentPart/) (tstamps /59409417/))
       (tstamp 59416658))
-    (comp (ref TP9)
+    (comp (ref SIG1)
       (value TEST)
       (footprint Tespoints:TP_SMD_quadr_1mm)
       (libsource (lib device) (part TEST))
@@ -534,31 +534,31 @@
       (libsource (lib conn) (part CONN_01X04))
       (sheetpath (names /highCurrentPart/) (tstamps /59409417/))
       (tstamp 5956B77E))
-    (comp (ref TP4)
+    (comp (ref GPIO1)
       (value TEST)
       (footprint Tespoints:TP_SMD_quadr_1mm)
       (libsource (lib device) (part TEST))
       (sheetpath (names /highCurrentPart/) (tstamps /59409417/))
       (tstamp 59595C55))
-    (comp (ref TP7)
+    (comp (ref GPIO2)
       (value TEST)
       (footprint Tespoints:TP_SMD_quadr_1mm)
       (libsource (lib device) (part TEST))
       (sheetpath (names /highCurrentPart/) (tstamps /59409417/))
       (tstamp 59596119))
-    (comp (ref TP5)
+    (comp (ref GPIO3)
       (value TEST)
       (footprint Tespoints:TP_SMD_quadr_1mm)
       (libsource (lib device) (part TEST))
       (sheetpath (names /highCurrentPart/) (tstamps /59409417/))
       (tstamp 59596260))
-    (comp (ref TP8)
+    (comp (ref GPIO4)
       (value TEST)
       (footprint Tespoints:TP_SMD_quadr_1mm)
       (libsource (lib device) (part TEST))
       (sheetpath (names /highCurrentPart/) (tstamps /59409417/))
       (tstamp 5959632C))
-    (comp (ref TP6)
+    (comp (ref 3V3)
       (value TEST)
       (footprint Tespoints:TP_SMD_quadr_1mm)
       (libsource (lib device) (part TEST))
@@ -814,10 +814,10 @@
       (pins
         (pin (num 1) (name ~) (type passive)))))
   (libraries
-    (library (logical device)
-      (uri /usr/share/kicad/library/device.lib))
     (library (logical transistors)
       (uri /usr/share/kicad/library/transistors.lib))
+    (library (logical device)
+      (uri /usr/share/kicad/library/device.lib))
     (library (logical conn)
       (uri /usr/share/kicad/library/conn.lib))
     (library (logical ad8616)
@@ -830,7 +830,7 @@
       (uri /home/maximilian/UppSense/pcbs/analog_board_v0.2/schematicSymb/ada4522-2.lib)))
   (nets
     (net (code 1) (name /interface/GPIO4)
-      (node (ref TP8) (pin 1))
+      (node (ref GPIO4) (pin 1))
       (node (ref Q7) (pin 1))
       (node (ref Q8) (pin 1))
       (node (ref J2) (pin 6)))
@@ -839,21 +839,21 @@
       (node (ref TP1) (pin 1)))
     (net (code 3) (name /interface/I2C_SDA)
       (node (ref J2) (pin 7))
-      (node (ref TP3) (pin 1)))
+      (node (ref I2C2) (pin 1)))
     (net (code 4) (name /interface/I2C_SCL)
-      (node (ref TP2) (pin 1))
+      (node (ref I2C1) (pin 1))
       (node (ref J2) (pin 9)))
     (net (code 5) (name /interface/ADC1)
       (node (ref R2) (pin 2))
       (node (ref C8) (pin 2))
       (node (ref J1) (pin 4)))
     (net (code 6) (name /interface/GPIO3)
-      (node (ref TP5) (pin 1))
+      (node (ref GPIO3) (pin 1))
       (node (ref Q4) (pin 1))
       (node (ref Q3) (pin 1))
       (node (ref J2) (pin 8)))
     (net (code 7) (name /interface/GPIO2)
-      (node (ref TP7) (pin 1))
+      (node (ref GPIO2) (pin 1))
       (node (ref Q6) (pin 1))
       (node (ref Q5) (pin 1))
       (node (ref J2) (pin 10)))
@@ -861,7 +861,7 @@
       (node (ref Q2) (pin 1))
       (node (ref J2) (pin 12))
       (node (ref Q1) (pin 1))
-      (node (ref TP4) (pin 1)))
+      (node (ref GPIO1) (pin 1)))
     (net (code 9) (name /interface/DAC1)
       (node (ref J2) (pin 1))
       (node (ref P2) (pin 3)))
@@ -892,7 +892,7 @@
       (node (ref U1) (pin 5))
       (node (ref C5) (pin 1)))
     (net (code 12) (name /highCurrentPart/-3.3V)
-      (node (ref TP6) (pin 1))
+      (node (ref 3V3) (pin 1))
       (node (ref C18) (pin 1))
       (node (ref U3) (pin 5))
       (node (ref C2) (pin 1))
@@ -1011,7 +1011,7 @@
       (node (ref Q1) (pin 3)))
     (net (code 33) (name Signal)
       (node (ref U4) (pin 3))
-      (node (ref TP9) (pin 1))
+      (node (ref SIG1) (pin 1))
       (node (ref P3) (pin 3))
       (node (ref P3) (pin 2))
       (node (ref P3) (pin 1)))

pcbs/analog_board_v0.2/analog_board_v0.2.sch

@@ -93,10 +93,10 @@ F7 "LED_CONTROLL" I L 7675 3025 60
 F8 "-3.3V" O R 9375 3825 60 
 $EndSheet
 $Comp
-L +3.3V #PWR3
+L +3.3V #PWR01
 U 1 1 59551FE0
 P 4475 3125
-F 0 "#PWR3" H 4475 2975 50  0001 C CNN
+F 0 "#PWR01" H 4475 2975 50  0001 C CNN
 F 1 "+3.3V" H 4475 3265 50  0000 C CNN
 F 2 "" H 4475 3125 50  0001 C CNN
 F 3 "" H 4475 3125 50  0001 C CNN
@@ -106,10 +106,10 @@ $EndComp
 Wire Wire Line
 	4825 3125 4475 3125
 $Comp
-L GND #PWR4
+L GND #PWR02
 U 1 1 595520F8
 P 4475 3225
-F 0 "#PWR4" H 4475 2975 50  0001 C CNN
+F 0 "#PWR02" H 4475 2975 50  0001 C CNN
 F 1 "GND" H 4475 3075 50  0000 C CNN
 F 2 "" H 4475 3225 50  0001 C CNN
 F 3 "" H 4475 3225 50  0001 C CNN
@@ -119,10 +119,10 @@ $EndComp
 Wire Wire Line
 	4475 3225 4825 3225
 $Comp
-L +5V #PWR2
+L +5V #PWR03
 U 1 1 59552732
 P 4475 2875
-F 0 "#PWR2" H 4475 2725 50  0001 C CNN
+F 0 "#PWR03" H 4475 2725 50  0001 C CNN
 F 1 "+5V" H 4475 3015 50  0000 C CNN
 F 2 "" H 4475 2875 50  0001 C CNN
 F 3 "" H 4475 2875 50  0001 C CNN
@@ -146,10 +146,10 @@ Wire Wire Line
 Wire Wire Line
 	6525 3575 7675 3575
 $Comp
-L TEST TP2
+L TEST I2C1
 U 1 1 59577F16
 P 6800 3725
-F 0 "TP2" H 6800 4025 50  0000 C BNN
+F 0 "I2C1" H 6800 4025 50  0000 C BNN
 F 1 "TEST" H 6800 3975 50  0000 C CNN
 F 2 "Tespoints:TP_SMD_quadr_1mm" H 6800 3725 50  0001 C CNN
 F 3 "" H 6800 3725 50  0001 C CNN
@@ -157,10 +157,10 @@ F 3 "" H 6800 3725 50  0001 C CNN
 	0    1    1    0   
 $EndComp
 $Comp
-L TEST TP3
+L TEST I2C2
 U 1 1 59578158
 P 6800 3950
-F 0 "TP3" H 6800 4250 50  0000 C BNN
+F 0 "I2C2" H 6800 4250 50  0000 C BNN
 F 1 "TEST" H 6800 4200 50  0000 C CNN
 F 2 "Tespoints:TP_SMD_quadr_1mm" H 6800 3950 50  0001 C CNN
 F 3 "" H 6800 3950 50  0001 C CNN
@@ -180,7 +180,7 @@ L TEST TP1
 U 1 1 5957A021
 P 6800 3125
 F 0 "TP1" H 6800 3425 50  0000 C BNN
-F 1 "TEST" H 6800 3375 50  0000 C CNN
+F 1 "DAC2" H 6800 3375 50  0000 C CNN
 F 2 "Tespoints:TP_SMD_quadr_1mm" H 6800 3125 50  0001 C CNN
 F 3 "" H 6800 3125 50  0001 C CNN
 	1    6800 3125
@@ -205,10 +205,10 @@ Wire Wire Line
 Wire Wire Line
 	1375 3175 1850 3175
 $Comp
-L +3.3V #PWR1
+L +3.3V #PWR04
 U 1 1 59593859
 P 1500 3025
-F 0 "#PWR1" H 1500 2875 50  0001 C CNN
+F 0 "#PWR04" H 1500 2875 50  0001 C CNN
 F 1 "+3.3V" H 1500 3165 50  0000 C CNN
 F 2 "" H 1500 3025 50  0001 C CNN
 F 3 "" H 1500 3025 50  0001 C CNN

pcbs/analog_board_v0.2/fp-lib-table

@@ -8,4 +8,5 @@
   (lib (name MyPotis)(type KiCad)(uri "$(KIPRJMOD)/MyPotis.pretty")(options "")(descr ""))
   (lib (name Vias)(type KiCad)(uri "$(KIPRJMOD)/Vias.pretty")(options "")(descr ""))
   (lib (name "Guard Connector")(type KiCad)(uri "$(KIPRJMOD)/GuardConnector.pretty")(options "")(descr ""))
+  (lib (name WithoutSilkscreen)(type KiCad)(uri "$(KIPRJMOD)/WithoutSilkscreen.pretty")(options "")(descr ""))
 )

pcbs/analog_board_v0.2/highCurrentPart.bak

@@ -48,10 +48,10 @@ Comment3 ""
 Comment4 ""
 $EndDescr
 $Comp
-L GND #PWR017
+L GND #PWR018
 U 1 1 5940A4E3
 P 8150 3325
-F 0 "#PWR017" H 8150 3075 50  0001 C CNN
+F 0 "#PWR018" H 8150 3075 50  0001 C CNN
 F 1 "GND" H 8150 3175 50  0000 C CNN
 F 2 "" H 8150 3325 50  0000 C CNN
 F 3 "" H 8150 3325 50  0000 C CNN
@@ -95,10 +95,10 @@ F 4 "1045425" H 9725 3025 60  0001 C CNN "Farnell"
 	0    -1   1    0   
 $EndComp
 $Comp
-L GND #PWR018
+L GND #PWR019
 U 1 1 5940A554
 P 9725 3325
-F 0 "#PWR018" H 9725 3075 50  0001 C CNN
+F 0 "#PWR019" H 9725 3075 50  0001 C CNN
 F 1 "GND" H 9725 3175 50  0000 C CNN
 F 2 "" H 9725 3325 50  0000 C CNN
 F 3 "" H 9725 3325 50  0000 C CNN
@@ -149,10 +149,10 @@ Wire Wire Line
 Wire Wire Line
 	6775 2050 6775 2150
 $Comp
-L +5V #PWR019
+L +5V #PWR020
 U 1 1 5940A5DC
 P 6775 1675
-F 0 "#PWR019" H 6775 1525 50  0001 C CNN
+F 0 "#PWR020" H 6775 1525 50  0001 C CNN
 F 1 "+5V" H 6775 1815 50  0000 C CNN
 F 2 "" H 6775 1675 50  0000 C CNN
 F 3 "" H 6775 1675 50  0000 C CNN
@@ -162,10 +162,10 @@ $EndComp
 Wire Wire Line
 	6775 1675 6775 1750
 $Comp
-L GND #PWR020
+L GND #PWR021
 U 1 1 5940A5E4
 P 6775 3350
-F 0 "#PWR020" H 6775 3100 50  0001 C CNN
+F 0 "#PWR021" H 6775 3100 50  0001 C CNN
 F 1 "GND" H 6775 3200 50  0000 C CNN
 F 2 "" H 6775 3350 50  0000 C CNN
 F 3 "" H 6775 3350 50  0000 C CNN
@@ -193,10 +193,10 @@ Wire Wire Line
 Text GLabel 7350 2750 0    60   Input ~ 0
 Signal
 $Comp
-L GND #PWR021
+L GND #PWR022
 U 1 1 5940A601
 P 7675 3925
-F 0 "#PWR021" H 7675 3675 50  0001 C CNN
+F 0 "#PWR022" H 7675 3675 50  0001 C CNN
 F 1 "GND" H 7675 3775 50  0000 C CNN
 F 2 "" H 7675 3925 50  0000 C CNN
 F 3 "" H 7675 3925 50  0000 C CNN
@@ -210,10 +210,10 @@ Wire Wire Line
 Text GLabel 9825 4450 2    60   Output ~ 0
 Signal
 $Comp
-L +5V #PWR022
+L +5V #PWR023
 U 1 1 5940A60A
 P 8450 3925
-F 0 "#PWR022" H 8450 3775 50  0001 C CNN
+F 0 "#PWR023" H 8450 3775 50  0001 C CNN
 F 1 "+5V" H 8450 4065 50  0000 C CNN
 F 2 "" H 8450 3925 50  0000 C CNN
 F 3 "" H 8450 3925 50  0000 C CNN
@@ -230,10 +230,10 @@ Wire Wire Line
 	6900 2775 6900 2550
 Connection ~ 6775 2775
 $Comp
-L GND #PWR023
+L GND #PWR024
 U 1 1 5940EF10
 P 8900 3325
-F 0 "#PWR023" H 8900 3075 50  0001 C CNN
+F 0 "#PWR024" H 8900 3075 50  0001 C CNN
 F 1 "GND" H 8900 3175 50  0000 C CNN
 F 2 "" H 8900 3325 50  0000 C CNN
 F 3 "" H 8900 3325 50  0000 C CNN
@@ -243,10 +243,10 @@ $EndComp
 Wire Wire Line
 	8900 2750 8900 3325
 $Comp
-L +5V #PWR024
+L +5V #PWR025
 U 1 1 594122D1
 P 8150 1525
-F 0 "#PWR024" H 8150 1375 50  0001 C CNN
+F 0 "#PWR025" H 8150 1375 50  0001 C CNN
 F 1 "+5V" H 8150 1665 50  0000 C CNN
 F 2 "" H 8150 1525 50  0000 C CNN
 F 3 "" H 8150 1525 50  0000 C CNN
@@ -293,10 +293,10 @@ Wire Wire Line
 	7350 1600 8150 1600
 Connection ~ 7600 1600
 $Comp
-L GND #PWR025
+L GND #PWR026
 U 1 1 594122F3
 P 7350 1975
-F 0 "#PWR025" H 7350 1725 50  0001 C CNN
+F 0 "#PWR026" H 7350 1725 50  0001 C CNN
 F 1 "GND" H 7350 1825 50  0000 C CNN
 F 2 "" H 7350 1975 50  0000 C CNN
 F 3 "" H 7350 1975 50  0000 C CNN
@@ -338,10 +338,10 @@ Connection ~ 9725 4450
 Wire Wire Line
 	9725 4450 9825 4450
 $Comp
-L TEST TP9
+L TEST SIG1
 U 1 1 594174AB
 P 9725 4225
-F 0 "TP9" H 9725 4525 50  0000 C BNN
+F 0 "SIG1" H 9725 4525 50  0000 C BNN
 F 1 "TEST" H 9725 4475 50  0000 C CNN
 F 2 "Tespoints:TP_SMD_quadr_1mm" H 9725 4225 50  0001 C CNN
 F 3 "" H 9725 4225 50  0000 C CNN
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 Text HLabel 9000 1875 1    60   Output ~ 0
 BPW34_OUT
 $Comp
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 Wire Wire Line
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 $Comp
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 F 3 "" H 1850 1800 50  0001 C CNN
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 F 3 "" H 3000 1425 50  0001 C CNN
@@ -802,10 +802,10 @@ Wire Wire Line
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 F 3 "" H 2900 2425 50  0001 C CNN
@@ -848,10 +848,10 @@ F 3 "" H 1450 1225 50  0000 C CNN
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 F 1 "+3.3V" H 1825 1265 50  0000 C CNN
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 F 3 "" H 1825 1125 50  0001 C CNN
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 Text GLabel 5400 5075 0    60   UnSpc ~ 0
 COIL_4
 $Comp
-L TEST TP4
+L TEST GPIO1
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 P 1950 3700
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@@ -904,10 +904,10 @@ F 3 "" H 1950 3700 50  0000 C CNN
 	-1   0    0    -1  
 $EndComp
 $Comp
-L TEST TP7
+L TEST GPIO2
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 P 4450 3700
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 F 1 "TEST" H 4450 3950 50  0000 C CNN
 F 2 "Tespoints:TP_SMD_quadr_1mm" H 4450 3700 50  0001 C CNN
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@@ -915,10 +915,10 @@ F 3 "" H 4450 3700 50  0000 C CNN
 	-1   0    0    -1  
 $EndComp
 $Comp
-L TEST TP5
+L TEST GPIO3
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 F 1 "TEST" H 1950 5650 50  0000 C CNN
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@@ -926,10 +926,10 @@ F 3 "" H 1950 5400 50  0000 C CNN
 	-1   0    0    -1  
 $EndComp
 $Comp
-L TEST TP8
+L TEST GPIO4
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 P 4450 5400
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 F 1 "TEST" H 4450 5650 50  0000 C CNN
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 F 3 "" H 4450 5400 50  0000 C CNN
@@ -937,10 +937,10 @@ F 3 "" H 4450 5400 50  0000 C CNN
 	-1   0    0    -1  
 $EndComp
 $Comp
-L TEST TP6
+L TEST 3V3
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 F 1 "TEST" H 3250 2400 50  0000 C CNN
 F 2 "Tespoints:TP_SMD_quadr_1mm" H 3250 2150 50  0001 C CNN
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pcbs/analog_board_v0.2/highCurrentPart.sch

@@ -48,10 +48,10 @@ Comment3 ""
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 $Comp
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 F 1 "GND" H 8150 3175 50  0000 C CNN
 F 2 "" H 8150 3325 50  0000 C CNN
 F 3 "" H 8150 3325 50  0000 C CNN
@@ -95,10 +95,10 @@ F 4 "1045425" H 9725 3025 60  0001 C CNN "Farnell"
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 $EndComp
 $Comp
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 F 1 "GND" H 9725 3175 50  0000 C CNN
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 F 3 "" H 6775 1675 50  0000 C CNN
@@ -162,10 +162,10 @@ $EndComp
 Wire Wire Line
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 F 1 "GND" H 6775 3200 50  0000 C CNN
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 Signal
 $Comp
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 $Comp
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 Wire Wire Line
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 F 1 "TEST" H 9725 4475 50  0000 C CNN
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@@ -386,10 +386,10 @@ F 4 "2447551" V 8900 4125 60  0001 C CNN "Farnell"
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 $EndComp
 $Comp
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 Wire Wire Line
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 $Comp
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 Wire Wire Line
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 Wire Wire Line
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 $Comp
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 Wire Wire Line
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 $Comp
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 F 3 "" H 2375 4725 50  0000 C CNN
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 Wire Wire Line
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 Wire Wire Line
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 $Comp
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 Wire Wire Line
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 $Comp
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 F 1 "+5V" H 4025 3640 50  0000 C CNN
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 F 3 "" H 4025 3500 50  0000 C CNN
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 Text HLabel 9000 4550 0    60   Input ~ 0
 LED_CONTROLL
 $Comp
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+F 0 "#PWR038" H 1850 1550 50  0001 C CNN
 F 1 "GND" H 1850 1650 50  0000 C CNN
 F 2 "" H 1850 1800 50  0001 C CNN
 F 3 "" H 1850 1800 50  0001 C CNN
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 Wire Wire Line
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+F 0 "#PWR039" H 3000 1275 50  0001 C CNN
 F 1 "+3.3V" H 3000 1565 50  0000 C CNN
 F 2 "" H 3000 1425 50  0001 C CNN
 F 3 "" H 3000 1425 50  0001 C CNN
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 Wire Wire Line
 	2900 1950 2900 2100
 $Comp
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+L GND #PWR040
 U 1 1 5956469D
 P 2900 2425
-F 0 "#PWR24" H 2900 2175 50  0001 C CNN
+F 0 "#PWR040" H 2900 2175 50  0001 C CNN
 F 1 "GND" H 2900 2275 50  0000 C CNN
 F 2 "" H 2900 2425 50  0001 C CNN
 F 3 "" H 2900 2425 50  0001 C CNN
@@ -848,10 +848,10 @@ F 3 "" H 1450 1225 50  0000 C CNN
 	-1   0    0    -1  
 $EndComp
 $Comp
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 F 1 "+3.3V" H 1825 1265 50  0000 C CNN
 F 2 "" H 1825 1125 50  0001 C CNN
 F 3 "" H 1825 1125 50  0001 C CNN
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 Text GLabel 5400 5075 0    60   UnSpc ~ 0
 COIL_4
 $Comp
-L TEST TP4
+L TEST GPIO1
 U 1 1 59595C55
 P 1950 3700
-F 0 "TP4" H 1950 4000 50  0000 C BNN
+F 0 "GPIO1" H 1950 4000 50  0000 C BNN
 F 1 "TEST" H 1950 3950 50  0000 C CNN
 F 2 "Tespoints:TP_SMD_quadr_1mm" H 1950 3700 50  0001 C CNN
 F 3 "" H 1950 3700 50  0000 C CNN
@@ -904,10 +904,10 @@ F 3 "" H 1950 3700 50  0000 C CNN
 	-1   0    0    -1  
 $EndComp
 $Comp
-L TEST TP7
+L TEST GPIO2
 U 1 1 59596119
 P 4450 3700
-F 0 "TP7" H 4450 4000 50  0000 C BNN
+F 0 "GPIO2" H 4450 4000 50  0000 C BNN
 F 1 "TEST" H 4450 3950 50  0000 C CNN
 F 2 "Tespoints:TP_SMD_quadr_1mm" H 4450 3700 50  0001 C CNN
 F 3 "" H 4450 3700 50  0000 C CNN
@@ -915,10 +915,10 @@ F 3 "" H 4450 3700 50  0000 C CNN
 	-1   0    0    -1  
 $EndComp
 $Comp
-L TEST TP5
+L TEST GPIO3
 U 1 1 59596260
 P 1950 5400
-F 0 "TP5" H 1950 5700 50  0000 C BNN
+F 0 "GPIO3" H 1950 5700 50  0000 C BNN
 F 1 "TEST" H 1950 5650 50  0000 C CNN
 F 2 "Tespoints:TP_SMD_quadr_1mm" H 1950 5400 50  0001 C CNN
 F 3 "" H 1950 5400 50  0000 C CNN
@@ -926,10 +926,10 @@ F 3 "" H 1950 5400 50  0000 C CNN
 	-1   0    0    -1  
 $EndComp
 $Comp
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+L TEST GPIO4
 U 1 1 5959632C
 P 4450 5400
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+F 0 "GPIO4" H 4450 5700 50  0000 C BNN
 F 1 "TEST" H 4450 5650 50  0000 C CNN
 F 2 "Tespoints:TP_SMD_quadr_1mm" H 4450 5400 50  0001 C CNN
 F 3 "" H 4450 5400 50  0000 C CNN
@@ -937,10 +937,10 @@ F 3 "" H 4450 5400 50  0000 C CNN
 	-1   0    0    -1  
 $EndComp
 $Comp
-L TEST TP6
+L TEST 3V3
 U 1 1 59596507
 P 3250 2150
-F 0 "TP6" H 3250 2450 50  0000 C BNN
+F 0 "3V3" H 3250 2450 50  0000 C BNN
 F 1 "TEST" H 3250 2400 50  0000 C CNN
 F 2 "Tespoints:TP_SMD_quadr_1mm" H 3250 2150 50  0001 C CNN
 F 3 "" H 3250 2150 50  0000 C CNN

pcbs/analog_board_v0.2/sensitiveReadout.bak

@@ -53,7 +53,7 @@ U 1 1 5940C87D
 P 4750 5050
 F 0 "D1" H 4770 5120 50  0000 L CNN
 F 1 "BPW34" H 4710 4940 50  0000 C CNN
-F 2 "Photodiodes:BPW34FA" H 4700 5050 50  0001 C CNN
+F 2 "Photodiodes:BPW34FA_w_Silks" H 4700 5050 50  0001 C CNN
 F 3 "http://www.farnell.com/datasheets/2046123.pdf" H 4700 5050 50  0001 C CNN
 F 4 "1045425" H 4750 5050 60  0001 C CNN "Farnell"
 	1    4750 5050
@@ -720,10 +720,10 @@ F 3 "" H 4750 4500 50  0001 C CNN
 $EndComp
 NoConn ~ 3150 4475
 $Comp
-L CONN_01X01 J?
+L CONN_01X01 J4
 U 1 1 595A39BE
 P 5225 5050
-F 0 "J?" H 5225 5150 50  0000 C CNN
+F 0 "J4" H 5225 5150 50  0000 C CNN
 F 1 "CONN_01X01" V 5325 5050 50  0000 C CNN
 F 2 "Guard Connector:GuardConnector" H 5225 5050 50  0001 C CNN
 F 3 "" H 5225 5050 50  0001 C CNN
@@ -731,10 +731,10 @@ F 3 "" H 5225 5050 50  0001 C CNN
 	-1   0    0    1   
 $EndComp
 $Comp
-L GNDA #PWR?
+L GNDA #PWR017
 U 1 1 595A3A5F
 P 5425 5050
-F 0 "#PWR?" H 5425 4800 50  0001 C CNN
+F 0 "#PWR017" H 5425 4800 50  0001 C CNN
 F 1 "GNDA" H 5425 4900 50  0000 C CNN
 F 2 "" H 5425 5050 50  0001 C CNN
 F 3 "" H 5425 5050 50  0001 C CNN

pcbs/analog_board_v0.2/sensitiveReadout.sch

@@ -53,17 +53,17 @@ U 1 1 5940C87D
 P 4750 5050
 F 0 "D1" H 4770 5120 50  0000 L CNN
 F 1 "BPW34" H 4710 4940 50  0000 C CNN
-F 2 "Photodiodes:BPW34FA" H 4700 5050 50  0001 C CNN
+F 2 "Photodiodes:BPW34FA_w_Silks" H 4700 5050 50  0001 C CNN
 F 3 "http://www.farnell.com/datasheets/2046123.pdf" H 4700 5050 50  0001 C CNN
 F 4 "1045425" H 4750 5050 60  0001 C CNN "Farnell"
 	1    4750 5050
 	0    -1   1    0   
 $EndComp
 $Comp
-L GND #PWR8
+L GND #PWR05
 U 1 1 5940C884
 P 4750 5225
-F 0 "#PWR8" H 4750 4975 50  0001 C CNN
+F 0 "#PWR05" H 4750 4975 50  0001 C CNN
 F 1 "GND" H 4750 5075 50  0000 C CNN
 F 2 "" H 4750 5225 50  0000 C CNN
 F 3 "" H 4750 5225 50  0000 C CNN
@@ -83,10 +83,10 @@ F 4 "2496946" H 4925 3750 60  0001 C CNN "Farnell"
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR9
+L GND #PWR06
 U 1 1 5941B3F1
 P 5425 4000
-F 0 "#PWR9" H 5425 3750 50  0001 C CNN
+F 0 "#PWR06" H 5425 3750 50  0001 C CNN
 F 1 "GND" H 5425 3850 50  0000 C CNN
 F 2 "" H 5425 4000 50  0000 C CNN
 F 3 "" H 5425 4000 50  0000 C CNN
@@ -99,7 +99,7 @@ U 1 1 5957CE13
 P 3750 4525
 F 0 "U1" H 3250 3675 50  0000 L CNN
 F 1 "ADA4530-1" H 3850 3675 50  0000 L CNN
-F 2 "SMD_Packages:SOIC-8-N" V 3800 3972 50  0001 C CNN
+F 2 "WithoutSilkscreen:SOIC-8-N-W-Silks" V 3800 3972 50  0001 C CNN
 F 3 "http://www.farnell.com/datasheets/2008040.pdf" V 3900 4022 50  0001 C CNN
 F 4 "2521248" H 3750 4525 60  0001 C CNN "Franell"
 	1    3750 4525
@@ -111,7 +111,7 @@ U 1 1 5957D2D0
 P 5125 4475
 F 0 "R1" V 5205 4475 50  0000 C CNN
 F 1 "10G" V 5125 4475 50  0000 C CNN
-F 2 "Resistors_SMD:R_0805" V 5055 4475 50  0001 C CNN
+F 2 "WithoutSilkscreen:R_0805_W_Silks" V 5055 4475 50  0001 C CNN
 F 3 "http://www.farnell.com/datasheets/1928778.pdf" H 5125 4475 50  0001 C CNN
 F 4 "2420577" V 5125 4475 60  0001 C CNN "Farnell"
 	1    5125 4475
@@ -165,10 +165,10 @@ F 4 "2496946" H 2575 3750 60  0001 C CNN "Farnell"
 	-1   0    0    -1  
 $EndComp
 $Comp
-L GND #PWR5
+L GND #PWR07
 U 1 1 5957E72A
 P 2075 4000
-F 0 "#PWR5" H 2075 3750 50  0001 C CNN
+F 0 "#PWR07" H 2075 3750 50  0001 C CNN
 F 1 "GND" H 2075 3850 50  0000 C CNN
 F 2 "" H 2075 4000 50  0000 C CNN
 F 3 "" H 2075 4000 50  0000 C CNN
@@ -200,10 +200,10 @@ F 4 "499687" H 2325 3750 60  0001 C CNN "Farnell"
 	-1   0    0    -1  
 $EndComp
 $Comp
-L GND #PWR6
+L GND #PWR08
 U 1 1 5957EBB0
 P 2750 4750
-F 0 "#PWR6" H 2750 4500 50  0001 C CNN
+F 0 "#PWR08" H 2750 4500 50  0001 C CNN
 F 1 "GND" H 2750 4600 50  0000 C CNN
 F 2 "" H 2750 4750 50  0000 C CNN
 F 3 "" H 2750 4750 50  0000 C CNN
@@ -251,10 +251,10 @@ F 4 "1576507" V 9075 3825 60  0001 C CNN "Farnell"
 	0    1    -1   0   
 $EndComp
 $Comp
-L GND #PWR11
+L GND #PWR09
 U 1 1 59581E5E
 P 6150 3850
-F 0 "#PWR11" H 6150 3600 50  0001 C CNN
+F 0 "#PWR09" H 6150 3600 50  0001 C CNN
 F 1 "GND" H 6150 3700 50  0000 C CNN
 F 2 "" H 6150 3850 50  0000 C CNN
 F 3 "" H 6150 3850 50  0000 C CNN
@@ -286,10 +286,10 @@ F 4 "2447551" V 6925 3825 60  0001 C CNN "Farnell"
 	0    -1   -1   0   
 $EndComp
 $Comp
-L GND #PWR17
+L GND #PWR010
 U 1 1 59582484
 P 9850 3850
-F 0 "#PWR17" H 9850 3600 50  0001 C CNN
+F 0 "#PWR010" H 9850 3600 50  0001 C CNN
 F 1 "GND" H 9850 3700 50  0000 C CNN
 F 2 "" H 9850 3850 50  0000 C CNN
 F 3 "" H 9850 3850 50  0000 C CNN
@@ -313,10 +313,10 @@ F 4 "2496946" H 7875 4950 60  0001 C CNN "Farnell"
 	-1   0    0    -1  
 $EndComp
 $Comp
-L GND #PWR14
+L GND #PWR011
 U 1 1 595855AC
 P 7375 5200
-F 0 "#PWR14" H 7375 4950 50  0001 C CNN
+F 0 "#PWR011" H 7375 4950 50  0001 C CNN
 F 1 "GND" H 7375 5050 50  0000 C CNN
 F 2 "" H 7375 5200 50  0000 C CNN
 F 3 "" H 7375 5200 50  0000 C CNN
@@ -362,10 +362,10 @@ F 4 "2496946" H 7875 3225 60  0001 C CNN "Farnell"
 	-1   0    0    -1  
 $EndComp
 $Comp
-L GND #PWR13
+L GND #PWR012
 U 1 1 595860BB
 P 7375 3475
-F 0 "#PWR13" H 7375 3225 50  0001 C CNN
+F 0 "#PWR012" H 7375 3225 50  0001 C CNN
 F 1 "GND" H 7375 3325 50  0000 C CNN
 F 2 "" H 7375 3475 50  0000 C CNN
 F 3 "" H 7375 3475 50  0000 C CNN
@@ -428,10 +428,10 @@ F 4 "WR08X2401FTL" V 6050 2200 60  0001 C CNN "Farnell"
 	0    -1   -1   0   
 $EndComp
 $Comp
-L GND #PWR12
+L GND #PWR013
 U 1 1 5958CBA1
 P 6300 2625
-F 0 "#PWR12" H 6300 2375 50  0001 C CNN
+F 0 "#PWR013" H 6300 2375 50  0001 C CNN
 F 1 "GND" H 6300 2475 50  0000 C CNN
 F 2 "" H 6300 2625 50  0000 C CNN
 F 3 "" H 6300 2625 50  0000 C CNN
@@ -465,10 +465,10 @@ F 4 "WR08X2401FTL" V 7375 2200 60  0001 C CNN "Farnell"
 	0    -1   -1   0   
 $EndComp
 $Comp
-L GND #PWR15
+L GND #PWR014
 U 1 1 5958D9EA
 P 7625 2625
-F 0 "#PWR15" H 7625 2375 50  0001 C CNN
+F 0 "#PWR014" H 7625 2375 50  0001 C CNN
 F 1 "GND" H 7625 2475 50  0000 C CNN
 F 2 "" H 7625 2625 50  0000 C CNN
 F 3 "" H 7625 2625 50  0000 C CNN
@@ -502,10 +502,10 @@ F 4 "WR08X2401FTL" V 9075 2200 60  0001 C CNN "Farnell"
 	0    -1   -1   0   
 $EndComp
 $Comp
-L GND #PWR16
+L GND #PWR015
 U 1 1 5958E51E
 P 9325 2625
-F 0 "#PWR16" H 9325 2375 50  0001 C CNN
+F 0 "#PWR015" H 9325 2375 50  0001 C CNN
 F 1 "GND" H 9325 2475 50  0000 C CNN
 F 2 "" H 9325 2625 50  0000 C CNN
 F 3 "" H 9325 2625 50  0000 C CNN
@@ -708,10 +708,10 @@ Wire Wire Line
 Text Notes 5825 800  0    60   ~ 0
 RC filters have a cut-off frequency of approx. 663 Hz.
 $Comp
-L GNDA #PWR7
+L GNDA #PWR016
 U 1 1 59590E1C
 P 4750 4500
-F 0 "#PWR7" H 4750 4250 50  0001 C CNN
+F 0 "#PWR016" H 4750 4250 50  0001 C CNN
 F 1 "GNDA" H 4750 4350 50  0000 C CNN
 F 2 "" H 4750 4500 50  0001 C CNN
 F 3 "" H 4750 4500 50  0001 C CNN
@@ -731,10 +731,10 @@ F 3 "" H 5225 5050 50  0001 C CNN
 	-1   0    0    1   
 $EndComp
 $Comp
-L GNDA #PWR10
+L GNDA #PWR017
 U 1 1 595A3A5F
 P 5425 5050
-F 0 "#PWR10" H 5425 4800 50  0001 C CNN
+F 0 "#PWR017" H 5425 4800 50  0001 C CNN
 F 1 "GNDA" H 5425 4900 50  0000 C CNN
 F 2 "" H 5425 5050 50  0001 C CNN
 F 3 "" H 5425 5050 50  0001 C CNN

pcbs/backplane/ConnectorsChina.pretty/LED_CONN_1.25_PITCH.kicad_mod

@@ -0,0 +1,16 @@
+(module Additional:LED_CONN_1.25_PITCH (layer F.Cu) (tedit 59415C5D)
+  (fp_text reference P3 (at 0 6.7 180) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value CONN_01X04 (at 0 -2.6) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_line (start 1.75 -1.725) (end 1.75 5.475) (layer F.SilkS) (width 0.15))
+  (fp_line (start -1.75 -1.725) (end -1.75 5.475) (layer F.SilkS) (width 0.15))
+  (fp_line (start -1.75 5.475) (end 1.75 5.475) (layer F.SilkS) (width 0.15))
+  (fp_line (start -1.75 -1.725) (end 1.75 -1.725) (layer F.SilkS) (width 0.15))
+  (pad 4 thru_hole circle (at 0 3.75) (size 1 1) (drill 0.7) (layers *.Cu *.Mask F.SilkS))
+  (pad 3 thru_hole circle (at 0 2.5) (size 1 1) (drill 0.7) (layers *.Cu *.Mask F.SilkS))
+  (pad 1 thru_hole circle (at 0 0) (size 1 1) (drill 0.7) (layers *.Cu *.Mask F.SilkS))
+  (pad 2 thru_hole circle (at 0 1.25) (size 1 1) (drill 0.7) (layers *.Cu *.Mask F.SilkS))
+)

pcbs/backplane/backplane-cache.lib

@@ -102,6 +102,32 @@ X P3 3 -200 -100 150 R 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
+# CONN_01X04
+#
+DEF CONN_01X04 J 0 40 Y N 1 F N
+F0 "J" 0 250 50 H V C CNN
+F1 "CONN_01X04" 100 0 50 V V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ Pin_Header_Straight_1X*
+ Pin_Header_Angled_1X*
+ Socket_Strip_Straight_1X*
+ Socket_Strip_Angled_1X*
+$ENDFPLIST
+DRAW
+S -50 -145 10 -155 0 1 0 N
+S -50 -45 10 -55 0 1 0 N
+S -50 55 10 45 0 1 0 N
+S -50 155 10 145 0 1 0 N
+S -50 200 50 -200 0 1 0 N
+X P1 1 -200 150 150 R 50 50 1 1 P
+X P2 2 -200 50 150 R 50 50 1 1 P
+X P3 3 -200 -50 150 R 50 50 1 1 P
+X P4 4 -200 -150 150 R 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
 # CONN_02X03
 #
 DEF CONN_02X03 J 0 1 Y N 1 F N

pcbs/backplane/backplane.bak

@@ -51,13 +51,13 @@ $EndDescr
 $Comp
 L USB_B P1
 U 1 1 5948EBA5
-P 1700 2500
-F 0 "P1" H 1900 2300 50  0000 C CNN
-F 1 "USB_B" H 1700 2850 50  0000 C CNN
-F 2 "myUSB:ZX62D-B-5P8(30)" V 1650 2400 50  0001 C CNN
-F 3 "http://www.farnell.com/cad/2110767.pdf" V 1650 2400 50  0001 C CNN
-F 4 "2554980" H 1700 2500 60  0001 C CNN "Farnell"
-	1    1700 2500
+P 1150 3500
+F 0 "P1" H 1350 3300 50  0000 C CNN
+F 1 "USB_B" H 1150 3850 50  0000 C CNN
+F 2 "myUSB:ZX62D-B-5P8(30)" V 1100 3400 50  0001 C CNN
+F 3 "http://www.farnell.com/cad/2110767.pdf" V 1100 3400 50  0001 C CNN
+F 4 "2554980" H 1150 3500 60  0001 C CNN "Farnell"
+	1    1150 3500
 	1    0    0    -1  
 $EndComp
 Text GLabel 4800 2250 0    60   UnSpc ~ 0
@@ -78,6 +78,7 @@ F 0 "P3" H 5050 2550 50  0000 C CNN
 F 1 "CONN_02X03" H 5050 2150 50  0001 C CNN
 F 2 "Pin_Headers:Pin_Header_Straight_2x03" H 5050 1150 50  0001 C CNN
 F 3 "" H 5050 1150 50  0000 C CNN
+F 4 "TSW-103-08-G-D-RA" H 5050 2350 60  0001 C CNN "Samtec"
 	1    5050 2350
 	1    0    0    -1  
 $EndComp
@@ -180,6 +181,7 @@ F 0 "P4" H 5050 3200 50  0000 C CNN
 F 1 "CONN_02X03" H 5050 2800 50  0001 C CNN
 F 2 "Pin_Headers:Pin_Header_Straight_2x03" H 5050 1800 50  0001 C CNN
 F 3 "" H 5050 1800 50  0000 C CNN
+F 4 "TSW-103-08-G-D-RA" H 5050 3000 60  0001 C CNN "Samtec"
 	1    5050 3000
 	1    0    0    -1  
 $EndComp
@@ -248,9 +250,9 @@ F 3 "" H 4450 4850 50  0000 C CNN
 	1    4450 4850
 	1    0    0    -1  
 $EndComp
-Text GLabel 2000 2500 2    60   BiDi ~ 0
+Text GLabel 1450 3500 2    60   BiDi ~ 0
 D+
-Text GLabel 2000 2600 2    60   BiDi ~ 0
+Text GLabel 1450 3600 2    60   BiDi ~ 0
 D-
 Text GLabel 5300 4100 0    60   BiDi ~ 0
 D-
@@ -259,12 +261,12 @@ D+
 $Comp
 L +5V #PWR9
 U 1 1 594FDB60
-P 2850 2250
-F 0 "#PWR9" H 2850 2100 50  0001 C CNN
-F 1 "+5V" H 2850 2390 50  0000 C CNN
-F 2 "" H 2850 2250 50  0000 C CNN
-F 3 "" H 2850 2250 50  0000 C CNN
-	1    2850 2250
+P 3150 2650
+F 0 "#PWR9" H 3150 2500 50  0001 C CNN
+F 1 "+5V" H 3150 2790 50  0000 C CNN
+F 2 "" H 3150 2650 50  0000 C CNN
+F 3 "" H 3150 2650 50  0000 C CNN
+	1    3150 2650
 	1    0    0    -1  
 $EndComp
 Text GLabel 4800 2900 0    60   UnSpc ~ 0
@@ -274,12 +276,12 @@ Text GLabel 4850 1550 0    60   UnSpc ~ 0
 $Comp
 L GND #PWR3
 U 1 1 594FE150
-P 1600 3000
-F 0 "#PWR3" H 1600 2750 50  0001 C CNN
-F 1 "GND" H 1600 2850 50  0000 C CNN
-F 2 "" H 1600 3000 50  0000 C CNN
-F 3 "" H 1600 3000 50  0000 C CNN
-	1    1600 3000
+P 1050 4000
+F 0 "#PWR3" H 1050 3750 50  0001 C CNN
+F 1 "GND" H 1050 3850 50  0000 C CNN
+F 2 "" H 1050 4000 50  0000 C CNN
+F 3 "" H 1050 4000 50  0000 C CNN
+	1    1050 4000
 	1    0    0    -1  
 $EndComp
 Text GLabel 4850 1950 0    60   UnSpc ~ 0
@@ -358,13 +360,17 @@ nRST
 Wire Wire Line
 	4300 4450 4450 4450
 Wire Wire Line
-	3850 4200 3850 4500
+	3850 4200 3850 4450
+Wire Wire Line
+	3850 4450 3850 4500
 Wire Wire Line
 	3850 4450 4000 4450
 Connection ~ 3850 4450
 Connection ~ 4450 4450
 Wire Wire Line
-	4450 4300 4450 4500
+	4450 4300 4450 4450
+Wire Wire Line
+	4450 4450 4450 4500
 Wire Wire Line
 	4450 4800 4450 4850
 Wire Wire Line
@@ -372,9 +378,13 @@ Wire Wire Line
 Wire Wire Line
 	9750 2050 9900 2050
 Wire Wire Line
-	9250 2050 9450 2050
+	9250 2050 9350 2050
+Wire Wire Line
+	9350 2050 9450 2050
+Wire Wire Line
+	9250 2850 9400 2850
 Wire Wire Line
-	9250 2850 9450 2850
+	9400 2850 9450 2850
 Wire Wire Line
 	9750 2850 9900 2850
 Wire Wire Line
@@ -438,7 +448,9 @@ F 3 "" H 6850 4050 50  0000 C CNN
 	1    0    0    -1  
 $EndComp
 Wire Wire Line
-	6850 3950 6850 4050
+	6850 3950 6850 4000
+Wire Wire Line
+	6850 4000 6850 4050
 Wire Wire Line
 	6850 4000 7150 4000
 Wire Wire Line
@@ -447,26 +459,30 @@ Connection ~ 6850 4000
 Wire Wire Line
 	6850 3600 6850 3650
 Wire Wire Line
-	7150 3550 7150 3650
+	7150 3550 7150 3600
+Wire Wire Line
+	7150 3600 7150 3650
 Connection ~ 7150 3600
 Connection ~ 6850 3600
 Text Notes 6500 4400 0    60   ~ 0
 Place decoupling capacitors close to component.
 Wire Wire Line
-	6300 3600 7150 3600
-Text GLabel 5300 3700 0    60   UnSpc ~ 0
+	6300 3600 6850 3600
+Wire Wire Line
+	6850 3600 7150 3600
+Text GLabel 4675 3700 0    60   UnSpc ~ 0
 UART_TX
-Text GLabel 5300 3800 0    60   UnSpc ~ 0
+Text GLabel 4675 3800 0    60   UnSpc ~ 0
 UART_RX
 $Comp
 L GND #PWR17
 U 1 1 5950262A
-P 4550 3650
-F 0 "#PWR17" H 4550 3400 50  0001 C CNN
-F 1 "GND" H 4550 3500 50  0000 C CNN
-F 2 "" H 4550 3650 50  0000 C CNN
-F 3 "" H 4550 3650 50  0000 C CNN
-	1    4550 3650
+P 4025 3650
+F 0 "#PWR17" H 4025 3400 50  0001 C CNN
+F 1 "GND" H 4025 3500 50  0000 C CNN
+F 2 "" H 4025 3650 50  0000 C CNN
+F 3 "" H 4025 3650 50  0000 C CNN
+	1    4025 3650
 	1    0    0    -1  
 $EndComp
 $Comp
@@ -496,7 +512,9 @@ F 4 "2496946" H 2750 1400 60  0001 C CNN "Farnell"
 	1    0    0    -1  
 $EndComp
 Wire Wire Line
-	2550 1150 3150 1150
+	2550 1150 2750 1150
+Wire Wire Line
+	2750 1150 3150 1150
 Wire Wire Line
 	2750 1550 2750 1650
 Wire Wire Line
@@ -535,7 +553,13 @@ F 3 "" H 700 1150 50  0000 C CNN
 	1    0    0    -1  
 $EndComp
 Wire Wire Line
-	700  1150 1750 1150
+	700  1150 900  1150
+Wire Wire Line
+	900  1150 1200 1150
+Wire Wire Line
+	1200 1150 1500 1150
+Wire Wire Line
+	1500 1150 1750 1150
 $Comp
 L +3.3V #PWR11
 U 1 1 59503F4E
@@ -565,10 +589,12 @@ $EndComp
 Wire Wire Line
 	6250 800  6800 800 
 Wire Wire Line
-	6250 1200 6800 1200
+	6250 1200 6500 1200
+Wire Wire Line
+	6500 1200 6800 1200
 Text Notes 7700 3450 0    60   ~ 0
 Auto program circuit, which is needed by the esptool to program via USB.
-Text Notes 4400 3600 2    60   ~ 0
+Text Notes 3150 2100 2    60   ~ 0
 Place decoupling capacitors close to component.
 $Comp
 L +3.3V #PWR20
@@ -609,7 +635,9 @@ $EndComp
 Wire Wire Line
 	1750 6150 1750 6200
 Wire Wire Line
-	2150 5850 2250 5850
+	2150 5850 2200 5850
+Wire Wire Line
+	2200 5850 2250 5850
 Wire Wire Line
 	1450 6450 2200 6450
 Wire Wire Line
@@ -659,7 +687,9 @@ $EndComp
 Wire Wire Line
 	1750 7350 1750 7400
 Wire Wire Line
-	2150 7050 2250 7050
+	2150 7050 2200 7050
+Wire Wire Line
+	2200 7050 2250 7050
 Wire Wire Line
 	1450 7650 2200 7650
 Wire Wire Line
@@ -704,26 +734,14 @@ Wire Wire Line
 $Comp
 L CONN_01X03 P8
 U 1 1 595100DC
-P 9250 5750
-F 0 "P8" H 9250 5950 50  0000 C CNN
-F 1 "CONN_01X03" V 9350 5750 50  0000 C CNN
-F 2 "mySamtec:Samtec-PHT-1-3-01-L-S" H 9250 5750 50  0001 C CNN
-F 3 "http://suddendocs.samtec.com/catalog_english/pht.pdf" H 9250 5750 50  0001 C CNN
-	1    9250 5750
+P 2350 3525
+F 0 "P8" H 2350 3725 50  0000 C CNN
+F 1 "CONN_01X03" V 2450 3525 50  0000 C CNN
+F 2 "mySamtec:Samtec-PHT-1-3-01-L-S" H 2350 3525 50  0001 C CNN
+F 3 "http://suddendocs.samtec.com/catalog_english/pht.pdf" H 2350 3525 50  0001 C CNN
+	1    2350 3525
 	0    1    1    0   
 $EndComp
-$Comp
-L +5V #PWR27
-U 1 1 59510293
-P 9350 5550
-F 0 "#PWR27" H 9350 5400 50  0001 C CNN
-F 1 "+5V" H 9350 5690 50  0000 C CNN
-F 2 "" H 9350 5550 50  0000 C CNN
-F 3 "" H 9350 5550 50  0000 C CNN
-	1    9350 5550
-	1    0    0    -1  
-$EndComp
-NoConn ~ 9150 5550
 Text GLabel 1900 6700 2    60   Input ~ 0
 LED_5V
 $Comp
@@ -746,8 +764,6 @@ Text GLabel 1850 5500 2    60   Input ~ 0
 LED_5V
 Wire Wire Line
 	1850 5500 1750 5500
-Text GLabel 9250 5550 1    60   Output ~ 0
-LED_5V
 Text GLabel 8350 1050 0    60   UnSpc ~ 0
 ADC1
 Text GLabel 8350 1250 0    60   UnSpc ~ 0
@@ -798,7 +814,9 @@ $EndComp
 Wire Wire Line
 	4200 6150 4200 6200
 Wire Wire Line
-	4600 5850 4700 5850
+	4600 5850 4650 5850
+Wire Wire Line
+	4650 5850 4700 5850
 Wire Wire Line
 	3900 6450 4650 6450
 Wire Wire Line
@@ -846,7 +864,9 @@ $EndComp
 Wire Wire Line
 	4200 7350 4200 7400
 Wire Wire Line
-	4600 7050 4700 7050
+	4600 7050 4650 7050
+Wire Wire Line
+	4650 7050 4700 7050
 Wire Wire Line
 	3900 7650 4650 7650
 Wire Wire Line
@@ -941,9 +961,13 @@ F 3 "" H 3050 3900 50  0000 C CNN
 	1    0    0    -1  
 $EndComp
 Wire Wire Line
-	3050 3900 5300 3900
+	3050 3900 3350 3900
 Wire Wire Line
-	900  1550 900  1650
+	3350 3900 5300 3900
+Wire Wire Line
+	900  1550 900  1600
+Wire Wire Line
+	900  1600 900  1650
 $Comp
 L GND #PWR2
 U 1 1 5951BEF5
@@ -994,7 +1018,7 @@ F 0 "C1" H 925 1500 50  0000 L CNN
 F 1 "10u" H 925 1300 50  0000 L CNN
 F 2 "Resistors_SMD:R_0805" H 938 1250 50  0001 C CNN
 F 3 "" H 900 1400 50  0000 C CNN
-F 4 "2496998" H 900 1400 60  0001 C CNN "Farnell"
+F 4 "1833812" H 900 1400 60  0001 C CNN "Farnell"
 	1    900  1400
 	1    0    0    -1  
 $EndComp
@@ -1043,7 +1067,9 @@ F 4 "2496946" H 1200 1400 60  0001 C CNN "Farnell"
 	1    0    0    -1  
 $EndComp
 Wire Wire Line
-	900  1600 1500 1600
+	900  1600 1200 1600
+Wire Wire Line
+	1200 1600 1500 1600
 Connection ~ 900  1600
 Connection ~ 1200 1600
 Wire Wire Line
@@ -1053,9 +1079,9 @@ Wire Wire Line
 	1500 1250 1500 1150
 Connection ~ 1500 1150
 Wire Wire Line
-	5300 3600 4550 3600
+	5300 3600 4025 3600
 Wire Wire Line
-	4550 3600 4550 3650
+	4025 3600 4025 3650
 $Comp
 L LED D5
 U 1 1 59521852
@@ -1141,7 +1167,9 @@ Wire Wire Line
 Text GLabel 7300 5600 0    60   Input ~ 0
 LED_5V
 Wire Wire Line
-	7300 5600 7400 5600
+	7300 5600 7350 5600
+Wire Wire Line
+	7350 5600 7400 5600
 $Comp
 L CONN_01X03 P7
 U 1 1 5952271F
@@ -1172,7 +1200,9 @@ $EndComp
 Text GLabel 7300 5950 0    60   Input ~ 0
 LED_3.3V
 Wire Wire Line
-	7300 5950 7400 5950
+	7300 5950 7350 5950
+Wire Wire Line
+	7350 5950 7400 5950
 Text Notes 4900 4900 0    60   ~ 0
 ATTENTION: RX_CH340G has to be connected to TX_ESP8266. The same goes for\nTX_CH340G and RX_EXP8266. \n
 Wire Wire Line
@@ -1223,10 +1253,8 @@ Wire Wire Line
 	6500 1150 6500 1200
 Connection ~ 6500 1200
 Wire Wire Line
-	1600 2900 1600 3000
-Wire Wire Line
-	2000 2300 2350 2300
-NoConn ~ 1700 2900
+	1050 3900 1050 4000
+NoConn ~ 1150 3900
 NoConn ~ 6700 2500
 NoConn ~ 6200 2900
 NoConn ~ 6700 3000
@@ -1344,33 +1372,33 @@ $EndComp
 $Comp
 L Q_PMOS_GSD Q3
 U 1 1 5952D128
-P 2550 2400
-F 0 "Q3" H 2750 2450 50  0000 L CNN
-F 1 "Si2323" H 2750 2350 50  0000 L CNN
-F 2 "TO_SOT_Packages_SMD:SOT-23" H 2750 2500 50  0001 C CNN
-F 3 "http://www.farnell.com/datasheets/2049166.pdf" H 2550 2400 50  0001 C CNN
-F 4 "1470106" H 2550 2400 60  0001 C CNN "Farnell"
-	1    2550 2400
+P 2850 2800
+F 0 "Q3" H 3050 2850 50  0000 L CNN
+F 1 "Si2323" H 3050 2750 50  0000 L CNN
+F 2 "TO_SOT_Packages_SMD:SOT-23" H 3050 2900 50  0001 C CNN
+F 3 "http://www.farnell.com/datasheets/2049166.pdf" H 2850 2800 50  0001 C CNN
+F 4 "1470106" H 2850 2800 60  0001 C CNN "Farnell"
+	1    2850 2800
 	0    -1   -1   0   
 $EndComp
 Wire Wire Line
-	2750 2300 2850 2300
+	3050 2700 3150 2700
 Wire Wire Line
-	2850 2300 2850 2250
+	3150 2700 3150 2650
 $Comp
 L GND #PWR7
 U 1 1 5952D660
-P 2550 2650
-F 0 "#PWR7" H 2550 2400 50  0001 C CNN
-F 1 "GND" H 2550 2500 50  0000 C CNN
-F 2 "" H 2550 2650 50  0000 C CNN
-F 3 "" H 2550 2650 50  0000 C CNN
-	1    2550 2650
+P 2850 3050
+F 0 "#PWR7" H 2850 2800 50  0001 C CNN
+F 1 "GND" H 2850 2900 50  0000 C CNN
+F 2 "" H 2850 3050 50  0000 C CNN
+F 3 "" H 2850 3050 50  0000 C CNN
+	1    2850 3050
 	1    0    0    -1  
 $EndComp
 Wire Wire Line
-	2550 2600 2550 2650
-Text Notes 4150 2500 2    60   ~ 0
+	2850 3000 2850 3050
+Text Notes 4450 2900 2    60   ~ 0
 Reverse polarization protection.
 Wire Wire Line
 	5000 5850 5050 5850
@@ -1401,4 +1429,90 @@ F 3 "" H 8350 2050 50  0001 C CNN
 	1    8350 2050
 	0    1    1    0   
 $EndComp
+$Comp
+L R R?
+U 1 1 595B8D25
+P 4975 3700
+F 0 "R?" V 4925 3875 50  0000 C CNN
+F 1 "470R" V 4975 3700 50  0000 C CNN
+F 2 "Resistors_SMD:R_0805" V 4905 3700 50  0001 C CNN
+F 3 "" H 4975 3700 50  0001 C CNN
+F 4 "2447662" V 4975 3700 60  0001 C CNN "Farnell"
+	1    4975 3700
+	0    1    1    0   
+$EndComp
+$Comp
+L R R?
+U 1 1 595B8F23
+P 4975 3800
+F 0 "R?" V 5025 3975 50  0000 C CNN
+F 1 "470R" V 4975 3800 50  0000 C CNN
+F 2 "Resistors_SMD:R_0805" V 4905 3800 50  0001 C CNN
+F 3 "" H 4975 3800 50  0001 C CNN
+F 4 "2447662" V 4975 3800 60  0001 C CNN "Farnell"
+	1    4975 3800
+	0    1    1    0   
+$EndComp
+Wire Wire Line
+	5125 3700 5300 3700
+Wire Wire Line
+	4825 3700 4675 3700
+Wire Wire Line
+	4675 3800 4825 3800
+Wire Wire Line
+	5125 3800 5300 3800
+$Comp
+L CONN_01X04 J?
+U 1 1 595BBF5F
+P 1025 2575
+F 0 "J?" H 1025 2825 50  0000 C CNN
+F 1 "CONN_01X04" V 1125 2575 50  0000 C CNN
+F 2 "" H 1025 2575 50  0001 C CNN
+F 3 "" H 1025 2575 50  0001 C CNN
+	1    1025 2575
+	-1   0    0    1   
+$EndComp
+$Comp
+L GND #PWR?
+U 1 1 595BCFB1
+P 1875 2575
+F 0 "#PWR?" H 1875 2325 50  0001 C CNN
+F 1 "GND" H 1875 2425 50  0000 C CNN
+F 2 "" H 1875 2575 50  0000 C CNN
+F 3 "" H 1875 2575 50  0000 C CNN
+	1    1875 2575
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	1225 2425 1875 2425
+Wire Wire Line
+	1875 2425 1875 2525
+Wire Wire Line
+	1875 2525 1875 2575
+Wire Wire Line
+	1225 2525 1875 2525
+Connection ~ 1875 2525
+Wire Wire Line
+	2350 2700 2350 3325
+Text GLabel 2250 3325 1    60   Input ~ 0
+5V_BATT
+Text GLabel 2450 3325 1    60   Input ~ 0
+5V_USB
+Wire Wire Line
+	2650 2700 2350 2700
+Text GLabel 1350 2725 2    60   Input ~ 0
+5V_BATT
+Wire Wire Line
+	1225 2725 1275 2725
+Wire Wire Line
+	1275 2725 1350 2725
+Wire Wire Line
+	1225 2625 1275 2625
+Wire Wire Line
+	1275 2625 1275 2725
+Connection ~ 1275 2725
+Text GLabel 1450 3300 2    60   Input ~ 0
+5V_USB
+Text Notes 2825 3875 2    60   ~ 0
+Choosable power source.
 $EndSCHEMATC

pcbs/backplane/backplane.kicad_pcb-bak

@@ -76,7 +76,7 @@
     (pad_to_mask_clearance 0.2)
     (aux_axis_origin 114.476 66.222)
     (grid_origin 114.476 116.222)
-    (visible_elements FFFFFFBF)
+    (visible_elements FFFFFF9F)
     (pcbplotparams
       (layerselection 0x00030_80000001)
       (usegerberextensions false)
@@ -1078,6 +1078,11 @@
       (scale (xyz 1 1 1))
       (rotate (xyz 0 0 90))
     )
+    (model /home/maximilian/UppSense/pcbs/backplane/packages3d/_T-1S6-08-TSW-1-08-3-RA-D.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
   )
 
   (module Pin_Headers:Pin_Header_Straight_2x03 (layer F.Cu) (tedit 5952510F) (tstamp 5950C8AC)

pcbs/backplane/backplane.net

@@ -1,7 +1,7 @@
 (export (version D)
   (design
     (source /home/maximilian/UppSense/pcbs/backplane/backplane.sch)
-    (date "tis 27 jun 2017 16:51:13")
+    (date "tis  4 jul 2017 14:42:34")
     (tool "Eeschema 4.0.6-e0-6349~52~ubuntu17.04.1")
     (sheet (number 1) (name /) (tstamps /)
       (title_block
@@ -27,6 +27,8 @@
     (comp (ref P3)
       (value CONN_02X03)
       (footprint Pin_Headers:Pin_Header_Straight_2x03)
+      (fields
+        (field (name Samtec) TSW-103-08-G-D-RA))
       (libsource (lib conn) (part CONN_02X03))
       (sheetpath (names /) (tstamps /))
       (tstamp 594F86D2))
@@ -52,6 +54,8 @@
     (comp (ref P4)
       (value CONN_02X03)
       (footprint Pin_Headers:Pin_Header_Straight_2x03)
+      (fields
+        (field (name Samtec) TSW-103-08-G-D-RA))
       (libsource (lib conn) (part CONN_02X03))
       (sheetpath (names /) (tstamps /))
       (tstamp 594FAFF9))
@@ -242,7 +246,7 @@
       (value 10u)
       (footprint Resistors_SMD:R_0805)
       (fields
-        (field (name Farnell) 2496998))
+        (field (name Farnell) 1833812))
       (libsource (lib device) (part C))
       (sheetpath (names /) (tstamps /))
       (tstamp 5951D05D))
@@ -385,7 +389,29 @@
       (footprint myTestPoints:TP_SMD_quadr_1mm)
       (libsource (lib device) (part TEST))
       (sheetpath (names /) (tstamps /))
-      (tstamp 595323B0)))
+      (tstamp 595323B0))
+    (comp (ref R9)
+      (value 470R)
+      (footprint Resistors_SMD:R_0805)
+      (fields
+        (field (name Farnell) 2447662))
+      (libsource (lib device) (part R))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 595B8D25))
+    (comp (ref R10)
+      (value 470R)
+      (footprint Resistors_SMD:R_0805)
+      (fields
+        (field (name Farnell) 2447662))
+      (libsource (lib device) (part R))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 595B8F23))
+    (comp (ref J1)
+      (value CONN_01X04)
+      (footprint ConnectorsChina:LED_CONN_1.25_PITCH)
+      (libsource (lib conn) (part CONN_01X04))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 595BBF5F)))
   (libparts
     (libpart (lib device) (part C)
       (description "Unpolarized capacitor")
@@ -432,6 +458,21 @@
         (pin (num 1) (name P1) (type passive))
         (pin (num 2) (name P2) (type passive))
         (pin (num 3) (name P3) (type passive))))
+    (libpart (lib conn) (part CONN_01X04)
+      (description "Connector, single row, 01x04, pin header")
+      (footprints
+        (fp Pin_Header_Straight_1X*)
+        (fp Pin_Header_Angled_1X*)
+        (fp Socket_Strip_Straight_1X*)
+        (fp Socket_Strip_Angled_1X*))
+      (fields
+        (field (name Reference) J)
+        (field (name Value) CONN_01X04))
+      (pins
+        (pin (num 1) (name P1) (type passive))
+        (pin (num 2) (name P2) (type passive))
+        (pin (num 3) (name P3) (type passive))
+        (pin (num 4) (name P4) (type passive))))
     (libpart (lib conn) (part CONN_02X03)
       (description "Connector, double row, 02x03, pin header")
       (footprints
@@ -604,221 +645,232 @@
   (libraries
     (library (logical device)
       (uri /usr/share/kicad/library/device.lib))
-    (library (logical ch340g)
-      (uri /home/maximilian/UppSense/pcbs/backplane/myLibs/ch340g.lib))
-    (library (logical linear)
-      (uri /usr/share/kicad/library/linear.lib))
     (library (logical transistors)
       (uri /usr/share/kicad/library/transistors.lib))
+    (library (logical conn)
+      (uri /usr/share/kicad/library/conn.lib))
     (library (logical regul)
       (uri /usr/share/kicad/library/regul.lib))
-    (library (logical conn)
-      (uri /usr/share/kicad/library/conn.lib)))
+    (library (logical linear)
+      (uri /usr/share/kicad/library/linear.lib))
+    (library (logical ch340g)
+      (uri /home/maximilian/UppSense/pcbs/backplane/myLibs/ch340g.lib)))
   (nets
-    (net (code 1) (name "Net-(R4-Pad2)")
-      (node (ref U3) (pin 7))
-      (node (ref U3) (pin 6))
-      (node (ref R4) (pin 2)))
+    (net (code 1) (name I2C_SDA)
+      (node (ref P6) (pin 7))
+      (node (ref P5) (pin 7))
+      (node (ref SDA1) (pin 1))
+      (node (ref U3) (pin 5)))
     (net (code 2) (name GND)
-      (node (ref C5) (pin 2))
-      (node (ref D6) (pin 1))
-      (node (ref D5) (pin 1))
       (node (ref P6) (pin 3))
-      (node (ref GND1) (pin 1))
-      (node (ref C8) (pin 2))
-      (node (ref Q3) (pin 1))
-      (node (ref C1) (pin 2))
       (node (ref C2) (pin 2))
-      (node (ref C3) (pin 2))
-      (node (ref U2) (pin 2))
-      (node (ref U1) (pin 4))
-      (node (ref P5) (pin 3))
-      (node (ref C4) (pin 2))
-      (node (ref U2) (pin 4))
-      (node (ref P1) (pin 5))
-      (node (ref C9) (pin 2))
       (node (ref C7) (pin 2))
       (node (ref C6) (pin 2))
+      (node (ref Q3) (pin 1))
+      (node (ref GND1) (pin 1))
+      (node (ref J1) (pin 4))
+      (node (ref J1) (pin 3))
+      (node (ref D5) (pin 1))
+      (node (ref U3) (pin 4))
       (node (ref P4) (pin 2))
+      (node (ref D6) (pin 1))
       (node (ref U4) (pin 1))
+      (node (ref C3) (pin 2))
+      (node (ref C5) (pin 2))
+      (node (ref U1) (pin 4))
+      (node (ref C9) (pin 2))
+      (node (ref U2) (pin 2))
+      (node (ref P5) (pin 3))
+      (node (ref P1) (pin 5))
       (node (ref P3) (pin 2))
-      (node (ref U3) (pin 4)))
-    (net (code 3) (name "Net-(D4-Pad1)")
-      (node (ref R4) (pin 1))
-      (node (ref D4) (pin 1)))
-    (net (code 4) (name "Net-(R3-Pad2)")
-      (node (ref R3) (pin 2))
-      (node (ref U3) (pin 1))
-      (node (ref U3) (pin 2)))
-    (net (code 5) (name I2C_SCL)
-      (node (ref P6) (pin 5))
-      (node (ref U3) (pin 3))
-      (node (ref P5) (pin 5))
-      (node (ref SCL1) (pin 1)))
-    (net (code 6) (name I2C_SDA)
-      (node (ref P6) (pin 7))
-      (node (ref U3) (pin 5))
-      (node (ref SDA1) (pin 1))
-      (node (ref P5) (pin 7)))
-    (net (code 7) (name "Net-(D3-Pad1)")
-      (node (ref R3) (pin 1))
-      (node (ref D3) (pin 1)))
-    (net (code 8) (name LED_5V)
-      (node (ref D1) (pin 2))
-      (node (ref R7) (pin 2))
-      (node (ref D3) (pin 2))
-      (node (ref D2) (pin 2))
+      (node (ref C4) (pin 2))
+      (node (ref U2) (pin 4))
+      (node (ref C8) (pin 2))
+      (node (ref C1) (pin 2)))
+    (net (code 3) (name LED_5V)
       (node (ref U1) (pin 8))
-      (node (ref U3) (pin 8))
+      (node (ref D2) (pin 2))
+      (node (ref R7) (pin 2))
+      (node (ref D1) (pin 2))
       (node (ref D4) (pin 2))
-      (node (ref P8) (pin 2)))
-    (net (code 9) (name "Net-(D1-Pad1)")
+      (node (ref U3) (pin 8))
+      (node (ref D3) (pin 2)))
+    (net (code 4) (name "Net-(D3-Pad1)")
+      (node (ref D3) (pin 1))
+      (node (ref R3) (pin 1)))
+    (net (code 5) (name "Net-(R4-Pad2)")
+      (node (ref R4) (pin 2))
+      (node (ref U3) (pin 7))
+      (node (ref U3) (pin 6)))
+    (net (code 6) (name UART_TX)
+      (node (ref P5) (pin 9))
+      (node (ref R9) (pin 2))
+      (node (ref U1) (pin 5)))
+    (net (code 7) (name "Net-(D1-Pad1)")
       (node (ref R1) (pin 1))
       (node (ref D1) (pin 1)))
-    (net (code 10) (name "Net-(R2-Pad2)")
-      (node (ref U1) (pin 7))
+    (net (code 8) (name "Net-(R2-Pad2)")
+      (node (ref R2) (pin 2))
       (node (ref U1) (pin 6))
-      (node (ref R2) (pin 2)))
-    (net (code 11) (name 5V)
-      (node (ref P4) (pin 1))
-      (node (ref Q3) (pin 2))
-      (node (ref C3) (pin 1))
-      (node (ref C2) (pin 1))
-      (node (ref P8) (pin 1))
-      (node (ref 5V0) (pin 1))
-      (node (ref U2) (pin 1))
-      (node (ref P3) (pin 1))
-      (node (ref C1) (pin 1)))
-    (net (code 12) (name "Net-(D2-Pad1)")
+      (node (ref U1) (pin 7)))
+    (net (code 9) (name "Net-(D4-Pad1)")
+      (node (ref D4) (pin 1))
+      (node (ref R4) (pin 1)))
+    (net (code 10) (name "Net-(R3-Pad2)")
+      (node (ref U3) (pin 1))
+      (node (ref R3) (pin 2))
+      (node (ref U3) (pin 2)))
+    (net (code 11) (name I2C_SCL)
+      (node (ref P6) (pin 5))
+      (node (ref SCL1) (pin 1))
+      (node (ref P5) (pin 5))
+      (node (ref U3) (pin 3)))
+    (net (code 12) (name "Net-(P8-Pad2)")
+      (node (ref Q3) (pin 3))
+      (node (ref P8) (pin 2)))
+    (net (code 13) (name "Net-(D2-Pad1)")
       (node (ref R2) (pin 1))
       (node (ref D2) (pin 1)))
-    (net (code 13) (name "Net-(R1-Pad2)")
-      (node (ref U1) (pin 1))
-      (node (ref U1) (pin 2))
-      (node (ref R1) (pin 2)))
-    (net (code 14) (name UART_TX)
-      (node (ref P5) (pin 9))
-      (node (ref U1) (pin 5))
-      (node (ref U4) (pin 2)))
-    (net (code 15) (name "Net-(P8-Pad3)")
-      (node (ref P8) (pin 3)))
-    (net (code 16) (name LED_3.3V)
-      (node (ref P7) (pin 2))
-      (node (ref R8) (pin 2)))
-    (net (code 17) (name ADC1)
-      (node (ref P4) (pin 3))
-      (node (ref ADC1) (pin 1))
-      (node (ref P3) (pin 3)))
-    (net (code 18) (name "Net-(P6-Pad11)")
-      (node (ref P6) (pin 11)))
-    (net (code 19) (name "Net-(P6-Pad12)")
-      (node (ref P6) (pin 12)))
-    (net (code 20) (name "Net-(P6-Pad9)")
-      (node (ref P6) (pin 9)))
-    (net (code 21) (name "Net-(P6-Pad2)")
-      (node (ref P6) (pin 2)))
-    (net (code 22) (name "Net-(P1-Pad4)")
-      (node (ref P1) (pin 4)))
-    (net (code 23) (name "Net-(P1-Pad1)")
-      (node (ref P1) (pin 1))
-      (node (ref Q3) (pin 3)))
-    (net (code 24) (name ADC2)
-      (node (ref P4) (pin 5))
-      (node (ref ADC2) (pin 1))
-      (node (ref P3) (pin 5)))
-    (net (code 25) (name "Net-(P7-Pad3)")
-      (node (ref P7) (pin 3)))
-    (net (code 26) (name DAC2)
-      (node (ref DAC2) (pin 1))
+    (net (code 14) (name DAC2)
       (node (ref P5) (pin 14))
-      (node (ref P6) (pin 14)))
-    (net (code 27) (name 3.3V)
-      (node (ref P7) (pin 1))
-      (node (ref P5) (pin 1))
-      (node (ref C9) (pin 1))
-      (node (ref 3V3) (pin 1))
-      (node (ref U4) (pin 16))
+      (node (ref P6) (pin 14))
+      (node (ref DAC2) (pin 1)))
+    (net (code 15) (name 3.3V)
       (node (ref C5) (pin 1))
-      (node (ref C8) (pin 1))
-      (node (ref C4) (pin 1))
-      (node (ref U2) (pin 3))
+      (node (ref U4) (pin 16))
+      (node (ref C9) (pin 1))
       (node (ref U4) (pin 4))
-      (node (ref P6) (pin 1)))
-    (net (code 28) (name DAC1)
-      (node (ref P6) (pin 13))
+      (node (ref P5) (pin 1))
+      (node (ref P7) (pin 1))
+      (node (ref U2) (pin 3))
+      (node (ref P6) (pin 1))
+      (node (ref C8) (pin 1))
+      (node (ref 3V3) (pin 1))
+      (node (ref C4) (pin 1)))
+    (net (code 16) (name DAC1)
+      (node (ref P5) (pin 13))
       (node (ref DAC1) (pin 1))
-      (node (ref P5) (pin 13)))
-    (net (code 29) (name ADC4)
+      (node (ref P6) (pin 13)))
+    (net (code 17) (name ADC4)
       (node (ref P3) (pin 6))
       (node (ref ADC4) (pin 1))
       (node (ref P4) (pin 6)))
-    (net (code 30) (name ADC3)
-      (node (ref P3) (pin 4))
+    (net (code 18) (name ADC3)
       (node (ref ADC3) (pin 1))
-      (node (ref P4) (pin 4)))
-    (net (code 31) (name "Net-(D6-Pad2)")
+      (node (ref P4) (pin 4))
+      (node (ref P3) (pin 4)))
+    (net (code 19) (name ADC2)
+      (node (ref P4) (pin 5))
+      (node (ref P3) (pin 5))
+      (node (ref ADC2) (pin 1)))
+    (net (code 20) (name ADC1)
+      (node (ref ADC1) (pin 1))
+      (node (ref P4) (pin 3))
+      (node (ref P3) (pin 3)))
+    (net (code 21) (name "Net-(P6-Pad11)")
+      (node (ref P6) (pin 11)))
+    (net (code 22) (name 5V_BATT)
+      (node (ref J1) (pin 1))
+      (node (ref J1) (pin 2))
+      (node (ref P8) (pin 3)))
+    (net (code 23) (name "Net-(P6-Pad12)")
+      (node (ref P6) (pin 12)))
+    (net (code 24) (name "Net-(R10-Pad1)")
+      (node (ref R10) (pin 1))
+      (node (ref U4) (pin 3)))
+    (net (code 25) (name "Net-(R9-Pad1)")
+      (node (ref U4) (pin 2))
+      (node (ref R9) (pin 1)))
+    (net (code 26) (name "Net-(D5-Pad2)")
+      (node (ref R7) (pin 1))
+      (node (ref D5) (pin 2)))
+    (net (code 27) (name "Net-(D6-Pad2)")
       (node (ref D6) (pin 2))
       (node (ref R8) (pin 1)))
-    (net (code 32) (name "Net-(D5-Pad2)")
-      (node (ref D5) (pin 2))
-      (node (ref R7) (pin 1)))
-    (net (code 33) (name GPIO4)
-      (node (ref P5) (pin 10))
-      (node (ref P6) (pin 10)))
-    (net (code 34) (name GPIO3)
-      (node (ref P5) (pin 8))
-      (node (ref P6) (pin 8)))
-    (net (code 35) (name GPIO2)
+    (net (code 28) (name 5V)
+      (node (ref 5V0) (pin 1))
+      (node (ref Q3) (pin 2))
+      (node (ref C1) (pin 1))
+      (node (ref U2) (pin 1))
+      (node (ref C3) (pin 1))
+      (node (ref P4) (pin 1))
+      (node (ref P3) (pin 1))
+      (node (ref C2) (pin 1)))
+    (net (code 29) (name "Net-(P6-Pad9)")
+      (node (ref P6) (pin 9)))
+    (net (code 30) (name "Net-(P6-Pad2)")
+      (node (ref P6) (pin 2)))
+    (net (code 31) (name "Net-(P1-Pad4)")
+      (node (ref P1) (pin 4)))
+    (net (code 32) (name LED_3.3V)
+      (node (ref P7) (pin 2))
+      (node (ref R8) (pin 2)))
+    (net (code 33) (name "Net-(P7-Pad3)")
+      (node (ref P7) (pin 3)))
+    (net (code 34) (name GPIO4)
+      (node (ref P6) (pin 10))
+      (node (ref P5) (pin 10)))
+    (net (code 35) (name GPIO3)
+      (node (ref P6) (pin 8))
+      (node (ref P5) (pin 8)))
+    (net (code 36) (name GPIO2)
       (node (ref P6) (pin 6))
       (node (ref P5) (pin 6)))
-    (net (code 36) (name GPIO1)
-      (node (ref P6) (pin 4))
-      (node (ref P5) (pin 4)))
-    (net (code 37) (name nRST)
-      (node (ref Q1) (pin 3))
-      (node (ref P5) (pin 12)))
-    (net (code 38) (name "Net-(U4-Pad9)")
-      (node (ref U4) (pin 9)))
+    (net (code 37) (name GPIO1)
+      (node (ref P5) (pin 4))
+      (node (ref P6) (pin 4)))
+    (net (code 38) (name nRST)
+      (node (ref P5) (pin 12))
+      (node (ref Q1) (pin 3)))
     (net (code 39) (name "Net-(U4-Pad15)")
       (node (ref U4) (pin 15)))
-    (net (code 40) (name "Net-(U4-Pad12)")
+    (net (code 40) (name "Net-(C7-Pad1)")
+      (node (ref Y1) (pin 1))
+      (node (ref C7) (pin 1))
+      (node (ref U4) (pin 8)))
+    (net (code 41) (name UART_RX)
+      (node (ref U1) (pin 3))
+      (node (ref P5) (pin 11))
+      (node (ref R10) (pin 2)))
+    (net (code 42) (name "Net-(U4-Pad12)")
       (node (ref U4) (pin 12)))
-    (net (code 41) (name "Net-(U4-Pad11)")
+    (net (code 43) (name "Net-(U4-Pad11)")
       (node (ref U4) (pin 11)))
-    (net (code 42) (name "Net-(U4-Pad10)")
+    (net (code 44) (name "Net-(U4-Pad10)")
       (node (ref U4) (pin 10)))
-    (net (code 43) (name D-)
+    (net (code 45) (name "Net-(U4-Pad9)")
+      (node (ref U4) (pin 9)))
+    (net (code 46) (name D-)
       (node (ref P1) (pin 2))
       (node (ref U4) (pin 6)))
-    (net (code 44) (name D+)
+    (net (code 47) (name D+)
       (node (ref U4) (pin 5))
       (node (ref P1) (pin 3)))
-    (net (code 45) (name GPIO0)
+    (net (code 48) (name GPIO0)
       (node (ref Q2) (pin 3))
       (node (ref P5) (pin 2)))
-    (net (code 46) (name RTS)
-      (node (ref Q1) (pin 2))
-      (node (ref U4) (pin 14))
-      (node (ref R6) (pin 2)))
-    (net (code 47) (name UART_RX)
-      (node (ref P5) (pin 11))
-      (node (ref U4) (pin 3))
-      (node (ref U1) (pin 3)))
-    (net (code 48) (name "Net-(Q2-Pad1)")
+    (net (code 49) (name "Net-(R1-Pad2)")
+      (node (ref R1) (pin 2))
+      (node (ref U1) (pin 1))
+      (node (ref U1) (pin 2)))
+    (net (code 50) (name "Net-(C6-Pad1)")
+      (node (ref U4) (pin 7))
+      (node (ref C6) (pin 1))
+      (node (ref Y1) (pin 2)))
+    (net (code 51) (name "Net-(Q2-Pad1)")
       (node (ref Q2) (pin 1))
       (node (ref R6) (pin 1)))
-    (net (code 49) (name "Net-(Q1-Pad1)")
-      (node (ref Q1) (pin 1))
-      (node (ref R5) (pin 1)))
-    (net (code 50) (name DTR)
+    (net (code 52) (name RTS)
+      (node (ref R6) (pin 2))
+      (node (ref U4) (pin 14))
+      (node (ref Q1) (pin 2)))
+    (net (code 53) (name "Net-(Q1-Pad1)")
+      (node (ref R5) (pin 1))
+      (node (ref Q1) (pin 1)))
+    (net (code 54) (name DTR)
       (node (ref U4) (pin 13))
       (node (ref R5) (pin 2))
       (node (ref Q2) (pin 2)))
-    (net (code 51) (name "Net-(C7-Pad1)")
-      (node (ref U4) (pin 8))
-      (node (ref Y1) (pin 1))
-      (node (ref C7) (pin 1)))
-    (net (code 52) (name "Net-(C6-Pad1)")
-      (node (ref U4) (pin 7))
-      (node (ref Y1) (pin 2))
-      (node (ref C6) (pin 1)))))
+    (net (code 55) (name 5V_USB)
+      (node (ref P1) (pin 1))
+      (node (ref P8) (pin 1)))))

pcbs/backplane/backplane.sch

@@ -51,13 +51,13 @@ $EndDescr
 $Comp
 L USB_B P1
 U 1 1 5948EBA5
-P 1700 2500
-F 0 "P1" H 1900 2300 50  0000 C CNN
-F 1 "USB_B" H 1700 2850 50  0000 C CNN
-F 2 "myUSB:ZX62D-B-5P8(30)" V 1650 2400 50  0001 C CNN
-F 3 "http://www.farnell.com/cad/2110767.pdf" V 1650 2400 50  0001 C CNN
-F 4 "2554980" H 1700 2500 60  0001 C CNN "Farnell"
-	1    1700 2500
+P 1150 3500
+F 0 "P1" H 1350 3300 50  0000 C CNN
+F 1 "USB_B" H 1150 3850 50  0000 C CNN
+F 2 "myUSB:ZX62D-B-5P8(30)" V 1100 3400 50  0001 C CNN
+F 3 "http://www.farnell.com/cad/2110767.pdf" V 1100 3400 50  0001 C CNN
+F 4 "2554980" H 1150 3500 60  0001 C CNN "Farnell"
+	1    1150 3500
 	1    0    0    -1  
 $EndComp
 Text GLabel 4800 2250 0    60   UnSpc ~ 0
@@ -78,6 +78,7 @@ F 0 "P3" H 5050 2550 50  0000 C CNN
 F 1 "CONN_02X03" H 5050 2150 50  0001 C CNN
 F 2 "Pin_Headers:Pin_Header_Straight_2x03" H 5050 1150 50  0001 C CNN
 F 3 "" H 5050 1150 50  0000 C CNN
+F 4 "TSW-103-08-G-D-RA" H 5050 2350 60  0001 C CNN "Samtec"
 	1    5050 2350
 	1    0    0    -1  
 $EndComp
@@ -180,6 +181,7 @@ F 0 "P4" H 5050 3200 50  0000 C CNN
 F 1 "CONN_02X03" H 5050 2800 50  0001 C CNN
 F 2 "Pin_Headers:Pin_Header_Straight_2x03" H 5050 1800 50  0001 C CNN
 F 3 "" H 5050 1800 50  0000 C CNN
+F 4 "TSW-103-08-G-D-RA" H 5050 3000 60  0001 C CNN "Samtec"
 	1    5050 3000
 	1    0    0    -1  
 $EndComp
@@ -248,9 +250,9 @@ F 3 "" H 4450 4850 50  0000 C CNN
 	1    4450 4850
 	1    0    0    -1  
 $EndComp
-Text GLabel 2000 2500 2    60   BiDi ~ 0
+Text GLabel 1450 3500 2    60   BiDi ~ 0
 D+
-Text GLabel 2000 2600 2    60   BiDi ~ 0
+Text GLabel 1450 3600 2    60   BiDi ~ 0
 D-
 Text GLabel 5300 4100 0    60   BiDi ~ 0
 D-
@@ -259,12 +261,12 @@ D+
 $Comp
 L +5V #PWR9
 U 1 1 594FDB60
-P 2850 2250
-F 0 "#PWR9" H 2850 2100 50  0001 C CNN
-F 1 "+5V" H 2850 2390 50  0000 C CNN
-F 2 "" H 2850 2250 50  0000 C CNN
-F 3 "" H 2850 2250 50  0000 C CNN
-	1    2850 2250
+P 3150 2650
+F 0 "#PWR9" H 3150 2500 50  0001 C CNN
+F 1 "+5V" H 3150 2790 50  0000 C CNN
+F 2 "" H 3150 2650 50  0000 C CNN
+F 3 "" H 3150 2650 50  0000 C CNN
+	1    3150 2650
 	1    0    0    -1  
 $EndComp
 Text GLabel 4800 2900 0    60   UnSpc ~ 0
@@ -274,12 +276,12 @@ Text GLabel 4850 1550 0    60   UnSpc ~ 0
 $Comp
 L GND #PWR3
 U 1 1 594FE150
-P 1600 3000
-F 0 "#PWR3" H 1600 2750 50  0001 C CNN
-F 1 "GND" H 1600 2850 50  0000 C CNN
-F 2 "" H 1600 3000 50  0000 C CNN
-F 3 "" H 1600 3000 50  0000 C CNN
-	1    1600 3000
+P 1050 4000
+F 0 "#PWR3" H 1050 3750 50  0001 C CNN
+F 1 "GND" H 1050 3850 50  0000 C CNN
+F 2 "" H 1050 4000 50  0000 C CNN
+F 3 "" H 1050 4000 50  0000 C CNN
+	1    1050 4000
 	1    0    0    -1  
 $EndComp
 Text GLabel 4850 1950 0    60   UnSpc ~ 0
@@ -358,13 +360,17 @@ nRST
 Wire Wire Line
 	4300 4450 4450 4450
 Wire Wire Line
-	3850 4200 3850 4500
+	3850 4200 3850 4450
+Wire Wire Line
+	3850 4450 3850 4500
 Wire Wire Line
 	3850 4450 4000 4450
 Connection ~ 3850 4450
 Connection ~ 4450 4450
 Wire Wire Line
-	4450 4300 4450 4500
+	4450 4300 4450 4450
+Wire Wire Line
+	4450 4450 4450 4500
 Wire Wire Line
 	4450 4800 4450 4850
 Wire Wire Line
@@ -372,9 +378,13 @@ Wire Wire Line
 Wire Wire Line
 	9750 2050 9900 2050
 Wire Wire Line
-	9250 2050 9450 2050
+	9250 2050 9350 2050
+Wire Wire Line
+	9350 2050 9450 2050
+Wire Wire Line
+	9250 2850 9400 2850
 Wire Wire Line
-	9250 2850 9450 2850
+	9400 2850 9450 2850
 Wire Wire Line
 	9750 2850 9900 2850
 Wire Wire Line
@@ -438,7 +448,9 @@ F 3 "" H 6850 4050 50  0000 C CNN
 	1    0    0    -1  
 $EndComp
 Wire Wire Line
-	6850 3950 6850 4050
+	6850 3950 6850 4000
+Wire Wire Line
+	6850 4000 6850 4050
 Wire Wire Line
 	6850 4000 7150 4000
 Wire Wire Line
@@ -447,26 +459,30 @@ Connection ~ 6850 4000
 Wire Wire Line
 	6850 3600 6850 3650
 Wire Wire Line
-	7150 3550 7150 3650
+	7150 3550 7150 3600
+Wire Wire Line
+	7150 3600 7150 3650
 Connection ~ 7150 3600
 Connection ~ 6850 3600
 Text Notes 6500 4400 0    60   ~ 0
 Place decoupling capacitors close to component.
 Wire Wire Line
-	6300 3600 7150 3600
-Text GLabel 5300 3700 0    60   UnSpc ~ 0
+	6300 3600 6850 3600
+Wire Wire Line
+	6850 3600 7150 3600
+Text GLabel 4675 3700 0    60   UnSpc ~ 0
 UART_TX
-Text GLabel 5300 3800 0    60   UnSpc ~ 0
+Text GLabel 4675 3800 0    60   UnSpc ~ 0
 UART_RX
 $Comp
 L GND #PWR17
 U 1 1 5950262A
-P 4550 3650
-F 0 "#PWR17" H 4550 3400 50  0001 C CNN
-F 1 "GND" H 4550 3500 50  0000 C CNN
-F 2 "" H 4550 3650 50  0000 C CNN
-F 3 "" H 4550 3650 50  0000 C CNN
-	1    4550 3650
+P 4025 3650
+F 0 "#PWR17" H 4025 3400 50  0001 C CNN
+F 1 "GND" H 4025 3500 50  0000 C CNN
+F 2 "" H 4025 3650 50  0000 C CNN
+F 3 "" H 4025 3650 50  0000 C CNN
+	1    4025 3650
 	1    0    0    -1  
 $EndComp
 $Comp
@@ -496,7 +512,9 @@ F 4 "2496946" H 2750 1400 60  0001 C CNN "Farnell"
 	1    0    0    -1  
 $EndComp
 Wire Wire Line
-	2550 1150 3150 1150
+	2550 1150 2750 1150
+Wire Wire Line
+	2750 1150 3150 1150
 Wire Wire Line
 	2750 1550 2750 1650
 Wire Wire Line
@@ -535,7 +553,13 @@ F 3 "" H 700 1150 50  0000 C CNN
 	1    0    0    -1  
 $EndComp
 Wire Wire Line
-	700  1150 1750 1150
+	700  1150 900  1150
+Wire Wire Line
+	900  1150 1200 1150
+Wire Wire Line
+	1200 1150 1500 1150
+Wire Wire Line
+	1500 1150 1750 1150
 $Comp
 L +3.3V #PWR11
 U 1 1 59503F4E
@@ -565,10 +589,12 @@ $EndComp
 Wire Wire Line
 	6250 800  6800 800 
 Wire Wire Line
-	6250 1200 6800 1200
+	6250 1200 6500 1200
+Wire Wire Line
+	6500 1200 6800 1200
 Text Notes 7700 3450 0    60   ~ 0
 Auto program circuit, which is needed by the esptool to program via USB.
-Text Notes 4400 3600 2    60   ~ 0
+Text Notes 3150 2100 2    60   ~ 0
 Place decoupling capacitors close to component.
 $Comp
 L +3.3V #PWR20
@@ -609,7 +635,9 @@ $EndComp
 Wire Wire Line
 	1750 6150 1750 6200
 Wire Wire Line
-	2150 5850 2250 5850
+	2150 5850 2200 5850
+Wire Wire Line
+	2200 5850 2250 5850
 Wire Wire Line
 	1450 6450 2200 6450
 Wire Wire Line
@@ -659,7 +687,9 @@ $EndComp
 Wire Wire Line
 	1750 7350 1750 7400
 Wire Wire Line
-	2150 7050 2250 7050
+	2150 7050 2200 7050
+Wire Wire Line
+	2200 7050 2250 7050
 Wire Wire Line
 	1450 7650 2200 7650
 Wire Wire Line
@@ -704,26 +734,14 @@ Wire Wire Line
 $Comp
 L CONN_01X03 P8
 U 1 1 595100DC
-P 9250 5750
-F 0 "P8" H 9250 5950 50  0000 C CNN
-F 1 "CONN_01X03" V 9350 5750 50  0000 C CNN
-F 2 "mySamtec:Samtec-PHT-1-3-01-L-S" H 9250 5750 50  0001 C CNN
-F 3 "http://suddendocs.samtec.com/catalog_english/pht.pdf" H 9250 5750 50  0001 C CNN
-	1    9250 5750
+P 2350 3525
+F 0 "P8" H 2350 3725 50  0000 C CNN
+F 1 "CONN_01X03" V 2450 3525 50  0000 C CNN
+F 2 "mySamtec:Samtec-PHT-1-3-01-L-S" H 2350 3525 50  0001 C CNN
+F 3 "http://suddendocs.samtec.com/catalog_english/pht.pdf" H 2350 3525 50  0001 C CNN
+	1    2350 3525
 	0    1    1    0   
 $EndComp
-$Comp
-L +5V #PWR27
-U 1 1 59510293
-P 9350 5550
-F 0 "#PWR27" H 9350 5400 50  0001 C CNN
-F 1 "+5V" H 9350 5690 50  0000 C CNN
-F 2 "" H 9350 5550 50  0000 C CNN
-F 3 "" H 9350 5550 50  0000 C CNN
-	1    9350 5550
-	1    0    0    -1  
-$EndComp
-NoConn ~ 9150 5550
 Text GLabel 1900 6700 2    60   Input ~ 0
 LED_5V
 $Comp
@@ -746,8 +764,6 @@ Text GLabel 1850 5500 2    60   Input ~ 0
 LED_5V
 Wire Wire Line
 	1850 5500 1750 5500
-Text GLabel 9250 5550 1    60   Output ~ 0
-LED_5V
 Text GLabel 8350 1050 0    60   UnSpc ~ 0
 ADC1
 Text GLabel 8350 1250 0    60   UnSpc ~ 0
@@ -798,7 +814,9 @@ $EndComp
 Wire Wire Line
 	4200 6150 4200 6200
 Wire Wire Line
-	4600 5850 4700 5850
+	4600 5850 4650 5850
+Wire Wire Line
+	4650 5850 4700 5850
 Wire Wire Line
 	3900 6450 4650 6450
 Wire Wire Line
@@ -846,7 +864,9 @@ $EndComp
 Wire Wire Line
 	4200 7350 4200 7400
 Wire Wire Line
-	4600 7050 4700 7050
+	4600 7050 4650 7050
+Wire Wire Line
+	4650 7050 4700 7050
 Wire Wire Line
 	3900 7650 4650 7650
 Wire Wire Line
@@ -941,9 +961,13 @@ F 3 "" H 3050 3900 50  0000 C CNN
 	1    0    0    -1  
 $EndComp
 Wire Wire Line
-	3050 3900 5300 3900
+	3050 3900 3350 3900
 Wire Wire Line
-	900  1550 900  1650
+	3350 3900 5300 3900
+Wire Wire Line
+	900  1550 900  1600
+Wire Wire Line
+	900  1600 900  1650
 $Comp
 L GND #PWR2
 U 1 1 5951BEF5
@@ -1043,7 +1067,9 @@ F 4 "2496946" H 1200 1400 60  0001 C CNN "Farnell"
 	1    0    0    -1  
 $EndComp
 Wire Wire Line
-	900  1600 1500 1600
+	900  1600 1200 1600
+Wire Wire Line
+	1200 1600 1500 1600
 Connection ~ 900  1600
 Connection ~ 1200 1600
 Wire Wire Line
@@ -1053,9 +1079,9 @@ Wire Wire Line
 	1500 1250 1500 1150
 Connection ~ 1500 1150
 Wire Wire Line
-	5300 3600 4550 3600
+	5300 3600 4025 3600
 Wire Wire Line
-	4550 3600 4550 3650
+	4025 3600 4025 3650
 $Comp
 L LED D5
 U 1 1 59521852
@@ -1141,7 +1167,9 @@ Wire Wire Line
 Text GLabel 7300 5600 0    60   Input ~ 0
 LED_5V
 Wire Wire Line
-	7300 5600 7400 5600
+	7300 5600 7350 5600
+Wire Wire Line
+	7350 5600 7400 5600
 $Comp
 L CONN_01X03 P7
 U 1 1 5952271F
@@ -1172,7 +1200,9 @@ $EndComp
 Text GLabel 7300 5950 0    60   Input ~ 0
 LED_3.3V
 Wire Wire Line
-	7300 5950 7400 5950
+	7300 5950 7350 5950
+Wire Wire Line
+	7350 5950 7400 5950
 Text Notes 4900 4900 0    60   ~ 0
 ATTENTION: RX_CH340G has to be connected to TX_ESP8266. The same goes for\nTX_CH340G and RX_EXP8266. \n
 Wire Wire Line
@@ -1223,10 +1253,8 @@ Wire Wire Line
 	6500 1150 6500 1200
 Connection ~ 6500 1200
 Wire Wire Line
-	1600 2900 1600 3000
-Wire Wire Line
-	2000 2300 2350 2300
-NoConn ~ 1700 2900
+	1050 3900 1050 4000
+NoConn ~ 1150 3900
 NoConn ~ 6700 2500
 NoConn ~ 6200 2900
 NoConn ~ 6700 3000
@@ -1344,33 +1372,33 @@ $EndComp
 $Comp
 L Q_PMOS_GSD Q3
 U 1 1 5952D128
-P 2550 2400
-F 0 "Q3" H 2750 2450 50  0000 L CNN
-F 1 "Si2323" H 2750 2350 50  0000 L CNN
-F 2 "TO_SOT_Packages_SMD:SOT-23" H 2750 2500 50  0001 C CNN
-F 3 "http://www.farnell.com/datasheets/2049166.pdf" H 2550 2400 50  0001 C CNN
-F 4 "1470106" H 2550 2400 60  0001 C CNN "Farnell"
-	1    2550 2400
+P 2850 2800
+F 0 "Q3" H 3050 2850 50  0000 L CNN
+F 1 "Si2323" H 3050 2750 50  0000 L CNN
+F 2 "TO_SOT_Packages_SMD:SOT-23" H 3050 2900 50  0001 C CNN
+F 3 "http://www.farnell.com/datasheets/2049166.pdf" H 2850 2800 50  0001 C CNN
+F 4 "1470106" H 2850 2800 60  0001 C CNN "Farnell"
+	1    2850 2800
 	0    -1   -1   0   
 $EndComp
 Wire Wire Line
-	2750 2300 2850 2300
+	3050 2700 3150 2700
 Wire Wire Line
-	2850 2300 2850 2250
+	3150 2700 3150 2650
 $Comp
 L GND #PWR7
 U 1 1 5952D660
-P 2550 2650
-F 0 "#PWR7" H 2550 2400 50  0001 C CNN
-F 1 "GND" H 2550 2500 50  0000 C CNN
-F 2 "" H 2550 2650 50  0000 C CNN
-F 3 "" H 2550 2650 50  0000 C CNN
-	1    2550 2650
+P 2850 3050
+F 0 "#PWR7" H 2850 2800 50  0001 C CNN
+F 1 "GND" H 2850 2900 50  0000 C CNN
+F 2 "" H 2850 3050 50  0000 C CNN
+F 3 "" H 2850 3050 50  0000 C CNN
+	1    2850 3050
 	1    0    0    -1  
 $EndComp
 Wire Wire Line
-	2550 2600 2550 2650
-Text Notes 4150 2500 2    60   ~ 0
+	2850 3000 2850 3050
+Text Notes 4450 2900 2    60   ~ 0
 Reverse polarization protection.
 Wire Wire Line
 	5000 5850 5050 5850
@@ -1401,4 +1429,90 @@ F 3 "" H 8350 2050 50  0001 C CNN
 	1    8350 2050
 	0    1    1    0   
 $EndComp
+$Comp
+L R R?
+U 1 1 595B8D25
+P 4975 3700
+F 0 "R?" V 4925 3875 50  0000 C CNN
+F 1 "470R" V 4975 3700 50  0000 C CNN
+F 2 "Resistors_SMD:R_0805" V 4905 3700 50  0001 C CNN
+F 3 "" H 4975 3700 50  0001 C CNN
+F 4 "2447662" V 4975 3700 60  0001 C CNN "Farnell"
+	1    4975 3700
+	0    1    1    0   
+$EndComp
+$Comp
+L R R?
+U 1 1 595B8F23
+P 4975 3800
+F 0 "R?" V 5025 3975 50  0000 C CNN
+F 1 "470R" V 4975 3800 50  0000 C CNN
+F 2 "Resistors_SMD:R_0805" V 4905 3800 50  0001 C CNN
+F 3 "" H 4975 3800 50  0001 C CNN
+F 4 "2447662" V 4975 3800 60  0001 C CNN "Farnell"
+	1    4975 3800
+	0    1    1    0   
+$EndComp
+Wire Wire Line
+	5125 3700 5300 3700
+Wire Wire Line
+	4825 3700 4675 3700
+Wire Wire Line
+	4675 3800 4825 3800
+Wire Wire Line
+	5125 3800 5300 3800
+$Comp
+L CONN_01X04 J?
+U 1 1 595BBF5F
+P 1025 2575
+F 0 "J?" H 1025 2825 50  0000 C CNN
+F 1 "CONN_01X04" V 1125 2575 50  0000 C CNN
+F 2 "ConnectorsChina:LED_CONN_1.25_PITCH" H 1025 2575 50  0001 C CNN
+F 3 "" H 1025 2575 50  0001 C CNN
+	1    1025 2575
+	-1   0    0    1   
+$EndComp
+$Comp
+L GND #PWR?
+U 1 1 595BCFB1
+P 1875 2575
+F 0 "#PWR?" H 1875 2325 50  0001 C CNN
+F 1 "GND" H 1875 2425 50  0000 C CNN
+F 2 "" H 1875 2575 50  0000 C CNN
+F 3 "" H 1875 2575 50  0000 C CNN
+	1    1875 2575
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	1225 2425 1875 2425
+Wire Wire Line
+	1875 2425 1875 2525
+Wire Wire Line
+	1875 2525 1875 2575
+Wire Wire Line
+	1225 2525 1875 2525
+Connection ~ 1875 2525
+Wire Wire Line
+	2350 2700 2350 3325
+Text GLabel 2250 3325 1    60   Input ~ 0
+5V_BATT
+Text GLabel 2450 3325 1    60   Input ~ 0
+5V_USB
+Wire Wire Line
+	2650 2700 2350 2700
+Text GLabel 1350 2725 2    60   Input ~ 0
+5V_BATT
+Wire Wire Line
+	1225 2725 1275 2725
+Wire Wire Line
+	1275 2725 1350 2725
+Wire Wire Line
+	1225 2625 1275 2625
+Wire Wire Line
+	1275 2625 1275 2725
+Connection ~ 1275 2725
+Text GLabel 1450 3300 2    60   Input ~ 0
+5V_USB
+Text Notes 2825 3875 2    60   ~ 0
+Choosable power source.
 $EndSCHEMATC

pcbs/backplane/fp-lib-table

@@ -4,4 +4,5 @@
   (lib (name myTestPoints)(type KiCad)(uri ${KIPRJMOD}/Testpoints.pretty)(options "")(descr ""))
   (lib (name myPics)(type KiCad)(uri ${KIPRJMOD}/myPics.pretty)(options "")(descr ""))
   (lib (name myVias)(type KiCad)(uri ${KIPRJMOD}/Vias.pretty)(options "")(descr ""))
+  (lib (name ConnectorsChina)(type KiCad)(uri "$(KIPRJMOD)/ConnectorsChina.pretty")(options "")(descr ""))
 )

pcbs/analog_board_v0.2/GuardConnector.pretty/BPW34FA.kicad_mod → pcbs/photodiode_extender/GuardConnector.pretty/GuardConnector.kicad_mod

@@ -1,8 +1,8 @@
-(module Photodiodes:BPW34FA (layer F.Cu) (tedit 595A30E3)
-  (fp_text reference D1 (at 0 1.778) (layer F.SilkS)
+(module GuardConnector (layer F.Cu) (tedit 595A314C)
+  (fp_text reference REF** (at 0 1.778) (layer F.SilkS)
     (effects (font (size 1 1) (thickness 0.15)))
   )
-  (fp_text value BPW34 (at 0 -1.524) (layer F.Fab)
+  (fp_text value GuardConnector (at 0 -1.524) (layer F.Fab)
     (effects (font (size 1 1) (thickness 0.15)))
   )
   (pad 1 thru_hole circle (at 0 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))

pcbs/photodiode_extender/Photodiodes.pretty/BPW34FA.kicad_mod

@@ -0,0 +1,30 @@
+(module BPW34FA (layer F.Cu) (tedit 58FDDC7C)
+  (fp_text reference REF** (at 0 3.81) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value BPW34FA (at 0 -3.81) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_line (start -0.8 -1.2) (end -0.6 -1.1) (layer F.SilkS) (width 0.15))
+  (fp_line (start -0.8 -1.2) (end -0.8 -1.5) (layer F.SilkS) (width 0.15))
+  (fp_line (start -0.5 -0.8) (end -0.5 -1) (layer F.SilkS) (width 0.15))
+  (fp_line (start -0.5 -1) (end -0.5 -0.8) (layer F.SilkS) (width 0.15))
+  (fp_line (start -0.5 -0.8) (end -0.3 -0.7) (layer F.SilkS) (width 0.15))
+  (fp_line (start -0.5 -0.8) (end 0.3 -1.3) (layer F.SilkS) (width 0.15))
+  (fp_line (start -0.8 -1.2) (end 0 -1.7) (layer F.SilkS) (width 0.15))
+  (fp_line (start -1.1 -0.9) (end -1.1 0.9) (layer F.SilkS) (width 0.15))
+  (fp_line (start -1.1 0) (end 0.6 0.9) (layer F.SilkS) (width 0.15))
+  (fp_line (start 0.6 0) (end 0.6 0.9) (layer F.SilkS) (width 0.15))
+  (fp_line (start 0.6 -0.9) (end 0.6 0) (layer F.SilkS) (width 0.15))
+  (fp_line (start -1.1 0) (end 0.6 -0.9) (layer F.SilkS) (width 0.15))
+  (fp_line (start -1.6 0) (end 1.5 0) (layer F.SilkS) (width 0.15))
+  (fp_line (start 1.5 0) (end 1.6 0) (layer F.SilkS) (width 0.15))
+  (fp_line (start 2 1) (end 2 2) (layer F.SilkS) (width 0.15))
+  (fp_line (start 2 -2) (end 2 -1) (layer F.SilkS) (width 0.15))
+  (fp_line (start -2 1) (end -2 2) (layer F.SilkS) (width 0.15))
+  (fp_line (start -2 -2) (end 2 -2) (layer F.SilkS) (width 0.15))
+  (fp_line (start -2 2) (end 2 2) (layer F.SilkS) (width 0.15))
+  (fp_line (start -2 -2) (end -2 -1) (layer F.SilkS) (width 0.15))
+  (pad 1 thru_hole circle (at -2.5 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
+  (pad 2 thru_hole circle (at 2.5 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
+)

pcbs/photodiode_extender/Photodiodes.pretty/BPW34FA_w_Silks.kicad_mod

@@ -0,0 +1,10 @@
+(module BPW34FA_w_Silks (layer F.Cu) (tedit 595B5503)
+  (fp_text reference D1 (at 0 3.048) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value BPW34 (at 0 -3.81) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (pad 1 thru_hole circle (at -2.5 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
+  (pad 2 thru_hole circle (at 2.5 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask))
+)

pcbs/photodiode_extender/Vias.pretty/Stitchging-Via-0.2-0.4.kicad_mod

@@ -0,0 +1,10 @@
+(module Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 5959001F)
+  (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (pad 1 thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+    (zone_connect 2))
+)

pcbs/photodiode_extender/Vias.pretty/Stitchging-Via-0.340.7.kicad_mod

@@ -0,0 +1,10 @@
+(module Stitchging-Via-0.340.7 (layer F.Cu) (tedit 59416441)
+  (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value Stitching-Via-0.3-0,7 (at 0 -1.27) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (pad 1 thru_hole circle (at 0 0) (size 0.7 0.7) (drill 0.4) (layers *.Cu)
+    (zone_connect 2))
+)

pcbs/photodiode_extender/Vias.pretty/Stitchging-Via-0.4-0.7.kicad_mod

@@ -0,0 +1,10 @@
+(module Stitchging-Via-0.4-0.7 (layer F.Cu) (tedit 5941646D)
+  (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value Stitching-Via-0.5-0.7 (at 0 -1.27) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (pad 1 thru_hole circle (at 0 0) (size 0.7 0.7) (drill 0.4) (layers *.Cu)
+    (zone_connect 2))
+)

pcbs/photodiode_extender/Vias.pretty/Stitchging-Via-0.6.kicad_mod

@@ -0,0 +1,10 @@
+(module Stitchging-Via-0.6 (layer F.Cu) (tedit 590A0DDF)
+  (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value Stitching-Via-0.6 (at 0 -1.27) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
+    (zone_connect 2))
+)

pcbs/photodiode_extender/Vias.pretty/Stitchging-Via-0.8-1.5.kicad_mod

@@ -0,0 +1,10 @@
+(module Stitchging-Via-0.8-1.5 (layer F.Cu) (tedit 59416394)
+  (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value Stitching-Via-0.8-1.5 (at 0 -1.27) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (pad 1 thru_hole circle (at 0 0) (size 1.5 1.5) (drill 0.9) (layers *.Cu)
+    (zone_connect 2))
+)

pcbs/photodiode_extender/WithoutSilkscreen.pretty/Pin_Header_Angled_1x01_Pitch2.54mm.kicad_mod

@@ -0,0 +1,28 @@
+(module Pin_Headers:Pin_Header_Angled_1x01_Pitch2.54mm (layer F.Cu) (tedit 595B7CB4)
+  (descr "Through hole angled pin header, 1x01, 2.54mm pitch, 6mm pin length, single row")
+  (tags "Through hole angled pin header THT 1x01 2.54mm single row")
+  (fp_text reference J2 (at -2.5 -3.5 90) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value CONN_01X01 (at 4.315 2.27) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_line (start 1.4 -1.27) (end 1.4 1.27) (layer F.Fab) (width 0.1))
+  (fp_line (start 1.4 1.27) (end 3.9 1.27) (layer F.Fab) (width 0.1))
+  (fp_line (start 3.9 1.27) (end 3.9 -1.27) (layer F.Fab) (width 0.1))
+  (fp_line (start 3.9 -1.27) (end 1.4 -1.27) (layer F.Fab) (width 0.1))
+  (fp_line (start 0 -0.32) (end 0 0.32) (layer F.Fab) (width 0.1))
+  (fp_line (start 0 0.32) (end 9.9 0.32) (layer F.Fab) (width 0.1))
+  (fp_line (start 9.9 0.32) (end 9.9 -0.32) (layer F.Fab) (width 0.1))
+  (fp_line (start 9.9 -0.32) (end 0 -0.32) (layer F.Fab) (width 0.1))
+  (fp_line (start -1.6 -1.6) (end -1.6 1.6) (layer F.CrtYd) (width 0.05))
+  (fp_line (start -1.6 1.6) (end 10.2 1.6) (layer F.CrtYd) (width 0.05))
+  (fp_line (start 10.2 1.6) (end 10.2 -1.6) (layer F.CrtYd) (width 0.05))
+  (fp_line (start 10.2 -1.6) (end -1.6 -1.6) (layer F.CrtYd) (width 0.05))
+  (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
+  (model Pin_Headers.3dshapes/Pin_Header_Angled_1x01_Pitch2.54mm.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 1 1 1))
+    (rotate (xyz 0 0 90))
+  )
+)

pcbs/photodiode_extender/WithoutSilkscreen.pretty/Pin_Header_Angled_1x01_Pitch2.54mm_W_Silkscreen.kicad_mod

@@ -0,0 +1,28 @@
+(module Pin_Header_Angled_1x01_Pitch2.54mm_W_Silkscreen (layer F.Cu) (tedit 595B7CB4)
+  (descr "Through hole angled pin header, 1x01, 2.54mm pitch, 6mm pin length, single row")
+  (tags "Through hole angled pin header THT 1x01 2.54mm single row")
+  (fp_text reference J2 (at -2.5 -3.5 90) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value CONN_01X01 (at 4.315 2.27) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_line (start 1.4 -1.27) (end 1.4 1.27) (layer F.Fab) (width 0.1))
+  (fp_line (start 1.4 1.27) (end 3.9 1.27) (layer F.Fab) (width 0.1))
+  (fp_line (start 3.9 1.27) (end 3.9 -1.27) (layer F.Fab) (width 0.1))
+  (fp_line (start 3.9 -1.27) (end 1.4 -1.27) (layer F.Fab) (width 0.1))
+  (fp_line (start 0 -0.32) (end 0 0.32) (layer F.Fab) (width 0.1))
+  (fp_line (start 0 0.32) (end 9.9 0.32) (layer F.Fab) (width 0.1))
+  (fp_line (start 9.9 0.32) (end 9.9 -0.32) (layer F.Fab) (width 0.1))
+  (fp_line (start 9.9 -0.32) (end 0 -0.32) (layer F.Fab) (width 0.1))
+  (fp_line (start -1.6 -1.6) (end -1.6 1.6) (layer F.CrtYd) (width 0.05))
+  (fp_line (start -1.6 1.6) (end 10.2 1.6) (layer F.CrtYd) (width 0.05))
+  (fp_line (start 10.2 1.6) (end 10.2 -1.6) (layer F.CrtYd) (width 0.05))
+  (fp_line (start 10.2 -1.6) (end -1.6 -1.6) (layer F.CrtYd) (width 0.05))
+  (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
+  (model Pin_Headers.3dshapes/Pin_Header_Angled_1x01_Pitch2.54mm.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 1 1 1))
+    (rotate (xyz 0 0 90))
+  )
+)

pcbs/photodiode_extender/fp-lib-table

@@ -0,0 +1,6 @@
+(fp_lib_table
+  (lib (name GuardConnector)(type KiCad)(uri "$(KIPRJMOD)/GuardConnector.pretty")(options "")(descr ""))
+  (lib (name Photodiodes)(type KiCad)(uri "$(KIPRJMOD)/Photodiodes.pretty")(options "")(descr ""))
+  (lib (name Vias)(type KiCad)(uri "$(KIPRJMOD)/Vias.pretty")(options "")(descr ""))
+  (lib (name WithoutSilkscreen)(type KiCad)(uri "$(KIPRJMOD)/WithoutSilkscreen.pretty")(options "")(descr ""))
+)

pcbs/photodiode_extender/photodiode_extender-cache.lib

@@ -0,0 +1,59 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# CONN_01X01
+#
+DEF CONN_01X01 J 0 40 Y N 1 F N
+F0 "J" 0 100 50 H V C CNN
+F1 "CONN_01X01" 100 0 50 V V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ Pin_Header_Straight_1X*
+ Pin_Header_Angled_1X*
+ Socket_Strip_Straight_1X*
+ Socket_Strip_Angled_1X*
+$ENDFPLIST
+DRAW
+S -50 5 10 -5 0 1 0 N
+S -50 50 50 -50 0 1 0 N
+X P1 1 -200 0 150 R 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# D_Photo
+#
+DEF D_Photo D 0 40 N N 1 F N
+F0 "D" 20 70 50 H V L CNN
+F1 "D_Photo" -40 -110 50 H V C CNN
+F2 "" -50 0 50 H I C CNN
+F3 "" -50 0 50 H I C CNN
+$FPLIST
+ *photodiode*
+$ENDFPLIST
+DRAW
+P 2 0 1 8 -100 50 -100 -50 N
+P 2 0 1 0 -80 70 -60 70 N
+P 2 0 1 0 0 0 -100 0 N
+P 3 0 1 0 -20 130 -80 70 -80 90 N
+P 4 0 1 8 0 -50 0 50 -100 0 0 -50 N
+P 5 0 1 0 30 130 -30 70 -30 90 -30 70 -10 70 N
+X K 1 -200 0 100 R 50 50 1 1 P
+X A 2 100 0 100 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# GNDA
+#
+DEF GNDA #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "GNDA" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GNDA 1 0 0 0 D 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+#End Library

pcbs/photodiode_extender/photodiode_extender.bak

@@ -0,0 +1,114 @@
+EESchema Schematic File Version 2
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+LIBS:photodiode_extender-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L D_Photo D1
+U 1 1 595A4990
+P 5775 2950
+F 0 "D1" H 5795 3020 50  0000 L CNN
+F 1 "D_Photo" H 5735 2840 50  0000 C CNN
+F 2 "Photodiodes:BPW34FA_w_Silks" H 5725 2950 50  0001 C CNN
+F 3 "" H 5725 2950 50  0001 C CNN
+	1    5775 2950
+	1    0    0    -1  
+$EndComp
+$Comp
+L CONN_01X01 J3
+U 1 1 595A4B36
+P 6175 3150
+F 0 "J3" H 6175 3250 50  0000 C CNN
+F 1 "CONN_01X01" V 6275 3150 50  0000 C CNN
+F 2 "Pin_Headers:Pin_Header_Angled_1x01_Pitch2.54mm" H 6175 3150 50  0001 C CNN
+F 3 "http://suddendocs.samtec.com/catalog_english/tsw_th.pdf" H 6175 3150 50  0001 C CNN
+F 4 "TSW-101-08-G-S-RA" H 6175 3150 60  0001 C CNN "Samtec"
+	1    6175 3150
+	0    1    1    0   
+$EndComp
+$Comp
+L GNDA #PWR01
+U 1 1 595A4D22
+P 4300 3100
+F 0 "#PWR01" H 4300 2850 50  0001 C CNN
+F 1 "GNDA" H 4300 2950 50  0000 C CNN
+F 2 "" H 4300 3100 50  0001 C CNN
+F 3 "" H 4300 3100 50  0001 C CNN
+	1    4300 3100
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	4300 2875 4300 3100
+Wire Wire Line
+	5350 2950 5575 2950
+Wire Wire Line
+	5875 2950 6175 2950
+$Comp
+L CONN_01X01 J2
+U 1 1 595A4E1F
+P 5350 3150
+F 0 "J2" H 5350 3250 50  0000 C CNN
+F 1 "CONN_01X01" V 5450 3150 50  0000 C CNN
+F 2 "Pin_Headers:Pin_Header_Angled_1x01_Pitch2.54mm" H 5350 3150 50  0001 C CNN
+F 3 "http://suddendocs.samtec.com/catalog_english/tsw_th.pdf" H 5350 3150 50  0001 C CNN
+F 4 "TSW-101-08-G-S-RA" H 5350 3150 60  0001 C CNN "Samtec"
+	1    5350 3150
+	0    1    1    0   
+$EndComp
+$Comp
+L CONN_01X01 J1
+U 1 1 595A4E84
+P 4750 3150
+F 0 "J1" H 4750 3250 50  0000 C CNN
+F 1 "CONN_01X01" V 4850 3150 50  0000 C CNN
+F 2 "Pin_Headers:Pin_Header_Angled_1x01_Pitch2.54mm" H 4750 3150 50  0001 C CNN
+F 3 "http://suddendocs.samtec.com/catalog_english/tsw_th.pdf" H 4750 3150 50  0001 C CNN
+F 4 "TSW-101-08-G-S-RA" H 4750 3150 60  0001 C CNN "Samtec"
+	1    4750 3150
+	0    1    1    0   
+$EndComp
+Wire Wire Line
+	4750 2950 4750 2875
+Wire Wire Line
+	4750 2875 4300 2875
+$EndSCHEMATC

pcbs/photodiode_extender/photodiode_extender.kicad_pcb

@@ -0,0 +1,872 @@
+(kicad_pcb (version 4) (host pcbnew 4.0.6-e0-6349~52~ubuntu17.04.1)
+
+  (general
+    (links 42)
+    (no_connects 0)
+    (area 119.924999 79.924999 135.075001 100.075001)
+    (thickness 1.6)
+    (drawings 15)
+    (tracks 2)
+    (zones 0)
+    (modules 44)
+    (nets 4)
+  )
+
+  (page A4)
+  (layers
+    (0 F.Cu signal)
+    (31 B.Cu signal)
+    (32 B.Adhes user)
+    (33 F.Adhes user)
+    (34 B.Paste user)
+    (35 F.Paste user)
+    (36 B.SilkS user)
+    (37 F.SilkS user)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (41 Cmts.User user)
+    (42 Eco1.User user)
+    (43 Eco2.User user)
+    (44 Edge.Cuts user)
+    (45 Margin user)
+    (46 B.CrtYd user)
+    (47 F.CrtYd user)
+    (48 B.Fab user)
+    (49 F.Fab user)
+  )
+
+  (setup
+    (last_trace_width 0.25)
+    (user_trace_width 0.4)
+    (trace_clearance 0.2)
+    (zone_clearance 0.381)
+    (zone_45_only no)
+    (trace_min 0.2)
+    (segment_width 0.2)
+    (edge_width 0.15)
+    (via_size 0.6)
+    (via_drill 0.4)
+    (via_min_size 0.4)
+    (via_min_drill 0.3)
+    (uvia_size 0.3)
+    (uvia_drill 0.1)
+    (uvias_allowed no)
+    (uvia_min_size 0.2)
+    (uvia_min_drill 0.1)
+    (pcb_text_width 0.3)
+    (pcb_text_size 1.5 1.5)
+    (mod_edge_width 0.15)
+    (mod_text_size 1 1)
+    (mod_text_width 0.15)
+    (pad_size 1.7 1.7)
+    (pad_drill 1)
+    (pad_to_mask_clearance 0.2)
+    (aux_axis_origin 0 0)
+    (visible_elements FFFFFF7F)
+    (pcbplotparams
+      (layerselection 0x00030_80000001)
+      (usegerberextensions false)
+      (excludeedgelayer true)
+      (linewidth 0.100000)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15)
+      (hpglpenoverlay 2)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 1)
+      (scaleselection 1)
+      (outputdirectory ""))
+  )
+
+  (net 0 "")
+  (net 1 "Net-(D1-Pad1)")
+  (net 2 "Net-(D1-Pad2)")
+  (net 3 GNDA)
+
+  (net_class Default "This is the default net class."
+    (clearance 0.2)
+    (trace_width 0.25)
+    (via_dia 0.6)
+    (via_drill 0.4)
+    (uvia_dia 0.3)
+    (uvia_drill 0.1)
+    (add_net GNDA)
+    (add_net "Net-(D1-Pad1)")
+    (add_net "Net-(D1-Pad2)")
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB97F)
+    (at 123 85)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB97A)
+    (at 123 84)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB975)
+    (at 123 83)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB970)
+    (at 124 83)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB96B)
+    (at 125 83)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB966)
+    (at 126 83)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB961)
+    (at 127 83)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB95C)
+    (at 127 84)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB957)
+    (at 127 85)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB952)
+    (at 127 86)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB94D)
+    (at 127 87)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB948)
+    (at 127 88)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB943)
+    (at 127 89)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB93E)
+    (at 127 90)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB939)
+    (at 127 91)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB934)
+    (at 127 92)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB92F)
+    (at 127 93)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB92A)
+    (at 127 94)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB925)
+    (at 127 95)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB920)
+    (at 127 96)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB91B)
+    (at 127 97)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB916)
+    (at 127 98)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB90F)
+    (at 123 86)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB90A)
+    (at 123 87)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB900)
+    (at 123 88)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB8FA)
+    (at 123 89)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB8F3)
+    (at 123 90)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB8ED)
+    (at 123 91)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB8E8)
+    (at 123 92)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB8E3)
+    (at 123 93)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB8DE)
+    (at 123 94)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB8D9)
+    (at 123 95)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB8D4)
+    (at 123 96)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB8CF)
+    (at 123 97)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB8C9)
+    (at 123 98)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB8C4)
+    (at 123 99)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB8BF)
+    (at 124 99)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB8BA)
+    (at 125 99)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB75A)
+    (at 126 99)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Pin_Headers:Pin_Header_Angled_1x01_Pitch2.54mm (layer F.Cu) (tedit 595B5706) (tstamp 595FB4D2)
+    (at 130 92.5 270)
+    (descr "Through hole angled pin header, 1x01, 2.54mm pitch, 6mm pin length, single row")
+    (tags "Through hole angled pin header THT 1x01 2.54mm single row")
+    (path /595A4B36)
+    (fp_text reference J3 (at -2.5 -1.5 360) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value CONN_01X01 (at 4.315 2.27 270) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 1.4 -1.27) (end 1.4 1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.4 1.27) (end 3.9 1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 3.9 1.27) (end 3.9 -1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 3.9 -1.27) (end 1.4 -1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 0 -0.32) (end 0 0.32) (layer F.Fab) (width 0.1))
+    (fp_line (start 0 0.32) (end 9.9 0.32) (layer F.Fab) (width 0.1))
+    (fp_line (start 9.9 0.32) (end 9.9 -0.32) (layer F.Fab) (width 0.1))
+    (fp_line (start 9.9 -0.32) (end 0 -0.32) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.28 -1.39) (end 1.28 1.39) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.28 1.39) (end 4.02 1.39) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.02 1.39) (end 4.02 -1.39) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.02 -1.39) (end 1.28 -1.39) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.28 -1.39) (end 1.28 1.27) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.28 1.27) (end 4.02 1.27) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.02 1.27) (end 4.02 -1.39) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.02 -1.39) (end 1.28 -1.39) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.02 -0.44) (end 4.02 0.44) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.02 0.44) (end 10.02 0.44) (layer F.SilkS) (width 0.12))
+    (fp_line (start 10.02 0.44) (end 10.02 -0.44) (layer F.SilkS) (width 0.12))
+    (fp_line (start 10.02 -0.44) (end 4.02 -0.44) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.97 -0.44) (end 1.28 -0.44) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.97 0.44) (end 1.28 0.44) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.02 -0.32) (end 10.02 -0.32) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.02 -0.2) (end 10.02 -0.2) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.02 -0.08) (end 10.02 -0.08) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.02 0.04) (end 10.02 0.04) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.02 0.16) (end 10.02 0.16) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.02 0.28) (end 10.02 0.28) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.02 0.4) (end 10.02 0.4) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.27 0) (end -1.27 -1.27) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.27 -1.27) (end 0 -1.27) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.6 -1.6) (end -1.6 1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.6 1.6) (end 10.2 1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 10.2 1.6) (end 10.2 -1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 10.2 -1.6) (end -1.6 -1.6) (layer F.CrtYd) (width 0.05))
+    (pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 2 "Net-(D1-Pad2)"))
+    (model Pin_Headers.3dshapes/Pin_Header_Angled_1x01_Pitch2.54mm.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 90))
+    )
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB742)
+    (at 127 99)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Photodiodes:BPW34FA_w_Silks (layer F.Cu) (tedit 595B5774) (tstamp 595B59D8)
+    (at 127.5 85)
+    (path /595A4990)
+    (fp_text reference D1 (at 0 -3.75) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value D_Photo (at 0 -3.81) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at -2.5 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
+      (net 1 "Net-(D1-Pad1)"))
+    (pad 2 thru_hole circle (at 2.5 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
+      (net 2 "Net-(D1-Pad2)"))
+  )
+
+  (module WithoutSilkscreen:Pin_Header_Angled_1x01_Pitch2.54mm_W_Silkscreen (layer F.Cu) (tedit 595B7E68) (tstamp 595B8012)
+    (at 122 92.5 270)
+    (descr "Through hole angled pin header, 1x01, 2.54mm pitch, 6mm pin length, single row")
+    (tags "Through hole angled pin header THT 1x01 2.54mm single row")
+    (path /595A4E84)
+    (fp_text reference J1 (at -2.5 0.25 360) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value CONN_01X01 (at 4.315 2.27 270) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 1.4 -1.27) (end 1.4 1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.4 1.27) (end 3.9 1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 3.9 1.27) (end 3.9 -1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 3.9 -1.27) (end 1.4 -1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 0 -0.32) (end 0 0.32) (layer F.Fab) (width 0.1))
+    (fp_line (start 0 0.32) (end 9.9 0.32) (layer F.Fab) (width 0.1))
+    (fp_line (start 9.9 0.32) (end 9.9 -0.32) (layer F.Fab) (width 0.1))
+    (fp_line (start 9.9 -0.32) (end 0 -0.32) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 -1.6) (end -1.6 1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.6 1.6) (end 10.2 1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 10.2 1.6) (end 10.2 -1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 10.2 -1.6) (end -1.6 -1.6) (layer F.CrtYd) (width 0.05))
+    (pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 3 GNDA))
+    (model Pin_Headers.3dshapes/Pin_Header_Angled_1x01_Pitch2.54mm.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 90))
+    )
+  )
+
+  (module WithoutSilkscreen:Pin_Header_Angled_1x01_Pitch2.54mm_W_Silkscreen (layer F.Cu) (tedit 595B7CB4) (tstamp 595B8023)
+    (at 125 92.5 270)
+    (descr "Through hole angled pin header, 1x01, 2.54mm pitch, 6mm pin length, single row")
+    (tags "Through hole angled pin header THT 1x01 2.54mm single row")
+    (path /595A4E1F)
+    (fp_text reference J2 (at -2.5 -3.5 360) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value CONN_01X01 (at 4.315 2.27 270) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 1.4 -1.27) (end 1.4 1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.4 1.27) (end 3.9 1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 3.9 1.27) (end 3.9 -1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 3.9 -1.27) (end 1.4 -1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 0 -0.32) (end 0 0.32) (layer F.Fab) (width 0.1))
+    (fp_line (start 0 0.32) (end 9.9 0.32) (layer F.Fab) (width 0.1))
+    (fp_line (start 9.9 0.32) (end 9.9 -0.32) (layer F.Fab) (width 0.1))
+    (fp_line (start 9.9 -0.32) (end 0 -0.32) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 -1.6) (end -1.6 1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.6 1.6) (end 10.2 1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 10.2 1.6) (end 10.2 -1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 10.2 -1.6) (end -1.6 -1.6) (layer F.CrtYd) (width 0.05))
+    (pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 1 "Net-(D1-Pad1)"))
+    (model Pin_Headers.3dshapes/Pin_Header_Angled_1x01_Pitch2.54mm.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 90))
+    )
+  )
+
+  (dimension 3 (width 0.3) (layer Dwgs.User)
+    (gr_text "3,0 mm" (at 127 76.25) (layer Dwgs.User)
+      (effects (font (size 1.5 1.5) (thickness 0.3)))
+    )
+    (feature1 (pts (xy 125 92.5) (xy 125 77.05)))
+    (feature2 (pts (xy 122 92.5) (xy 122 77.05)))
+    (crossbar (pts (xy 122 79.75) (xy 125 79.75)))
+    (arrow1a (pts (xy 125 79.75) (xy 123.873496 80.336421)))
+    (arrow1b (pts (xy 125 79.75) (xy 123.873496 79.163579)))
+    (arrow2a (pts (xy 122 79.75) (xy 123.126504 80.336421)))
+    (arrow2b (pts (xy 122 79.75) (xy 123.126504 79.163579)))
+  )
+  (gr_text "Photodiode Extender" (at 133 90 90) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.2)))
+  )
+  (gr_text "5.84 + 2.54 + 1.52 = 9.9\n9.9  - 7.5 = 2.4\n2.4 - 1.6 = 0.8  \nThis is the length the headers will stand out with." (at 114.5 108.5) (layer Dwgs.User)
+    (effects (font (size 1.5 1.5) (thickness 0.3)) (justify left))
+  )
+  (dimension 7.5 (width 0.3) (layer Dwgs.User)
+    (gr_text "7,5 mm" (at 116.5 92 90) (layer Dwgs.User)
+      (effects (font (size 1.5 1.5) (thickness 0.3)))
+    )
+    (feature1 (pts (xy 122 92.5) (xy 116.3 92.5)))
+    (feature2 (pts (xy 122 100) (xy 116.3 100)))
+    (crossbar (pts (xy 119 100) (xy 119 92.5)))
+    (arrow1a (pts (xy 119 92.5) (xy 119.586421 93.626504)))
+    (arrow1b (pts (xy 119 92.5) (xy 118.413579 93.626504)))
+    (arrow2a (pts (xy 119 100) (xy 119.586421 98.873496)))
+    (arrow2b (pts (xy 119 100) (xy 118.413579 98.873496)))
+  )
+  (gr_line (start 122.5 100) (end 132.5 100) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 120 82.5) (end 120 97.5) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 132.5 80) (end 122.5 80) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 135 82.5) (end 135 97.5) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_arc (start 122.5 97.5) (end 122.5 100) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_arc (start 132.5 97.5) (end 135 97.5) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_arc (start 122.5 82.5) (end 120 82.5) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_arc (start 132.5 82.5) (end 132.5 80) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (dimension 15 (width 0.3) (layer Dwgs.User)
+    (gr_text "15,000 mm" (at 113.65 92.5 270) (layer Dwgs.User)
+      (effects (font (size 1.5 1.5) (thickness 0.3)))
+    )
+    (feature1 (pts (xy 130 100) (xy 112.3 100)))
+    (feature2 (pts (xy 130 85) (xy 112.3 85)))
+    (crossbar (pts (xy 115 85) (xy 115 100)))
+    (arrow1a (pts (xy 115 100) (xy 114.413579 98.873496)))
+    (arrow1b (pts (xy 115 100) (xy 115.586421 98.873496)))
+    (arrow2a (pts (xy 115 85) (xy 114.413579 86.126504)))
+    (arrow2b (pts (xy 115 85) (xy 115.586421 86.126504)))
+  )
+  (dimension 15 (width 0.3) (layer Dwgs.User)
+    (gr_text "15,000 mm" (at 128 73) (layer Dwgs.User)
+      (effects (font (size 1.5 1.5) (thickness 0.3)))
+    )
+    (feature1 (pts (xy 135 80) (xy 135 75)))
+    (feature2 (pts (xy 120 80) (xy 120 75)))
+    (crossbar (pts (xy 120 75) (xy 135 75)))
+    (arrow1a (pts (xy 135 75) (xy 133.873496 75.586421)))
+    (arrow1b (pts (xy 135 75) (xy 133.873496 74.413579)))
+    (arrow2a (pts (xy 120 75) (xy 121.126504 75.586421)))
+    (arrow2b (pts (xy 120 75) (xy 121.126504 74.413579)))
+  )
+  (dimension 20 (width 0.3) (layer Dwgs.User)
+    (gr_text "20,000 mm" (at 146.35 90 270) (layer Dwgs.User)
+      (effects (font (size 1.5 1.5) (thickness 0.3)))
+    )
+    (feature1 (pts (xy 135 100) (xy 147.7 100)))
+    (feature2 (pts (xy 135 80) (xy 147.7 80)))
+    (crossbar (pts (xy 145 80) (xy 145 100)))
+    (arrow1a (pts (xy 145 100) (xy 144.413579 98.873496)))
+    (arrow1b (pts (xy 145 100) (xy 145.586421 98.873496)))
+    (arrow2a (pts (xy 145 80) (xy 144.413579 81.126504)))
+    (arrow2b (pts (xy 145 80) (xy 145.586421 81.126504)))
+  )
+
+  (segment (start 125 85) (end 125 92.5) (width 0.4) (layer F.Cu) (net 1))
+  (segment (start 130 85) (end 130 92.5) (width 0.4) (layer F.Cu) (net 2))
+
+  (zone (net 3) (net_name GNDA) (layer F.Cu) (tstamp 595FB6E5) (hatch edge 0.508)
+    (connect_pads yes (clearance 0.381))
+    (min_thickness 0.2)
+    (fill yes (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.5))
+    (polygon
+      (pts
+        (xy 122.5 82.5) (xy 127.5 82.5) (xy 127.5 100) (xy 122.5 100) (xy 122.5 91)
+      )
+    )
+    (filled_polygon
+      (pts
+        (xy 127.4 99.444) (xy 122.6 99.444) (xy 122.6 91.65) (xy 123.659577 91.65) (xy 123.659577 93.35)
+        (xy 123.693117 93.528248) (xy 123.798461 93.691958) (xy 123.959198 93.801785) (xy 124.15 93.840423) (xy 125.85 93.840423)
+        (xy 126.028248 93.806883) (xy 126.191958 93.701539) (xy 126.301785 93.540802) (xy 126.340423 93.35) (xy 126.340423 91.65)
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+      )
+    )
+  )
+  (zone (net 3) (net_name GNDA) (layer B.Cu) (tstamp 595FB6EF) (hatch edge 0.508)
+    (connect_pads yes (clearance 0.381))
+    (min_thickness 0.2)
+    (fill yes (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.5))
+    (polygon
+      (pts
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+    (filled_polygon
+      (pts
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+      )
+    )
+  )
+  (zone (net 0) (net_name "") (layer F.Mask) (tstamp 595B58E0) (hatch edge 0.508)
+    (connect_pads (clearance 0.381))
+    (min_thickness 0.254)
+    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
+    (polygon
+      (pts
+        (xy 122.75 82.75) (xy 127.25 82.75) (xy 127.25 99.25) (xy 122.75 99.25)
+      )
+    )
+    (filled_polygon
+      (pts
+        (xy 127.123 99.123) (xy 122.877 99.123) (xy 122.877 82.877) (xy 127.123 82.877)
+      )
+    )
+  )
+)

pcbs/photodiode_extender/photodiode_extender.kicad_pcb-bak

@@ -0,0 +1,872 @@
+(kicad_pcb (version 4) (host pcbnew 4.0.6-e0-6349~52~ubuntu17.04.1)
+
+  (general
+    (links 42)
+    (no_connects 0)
+    (area 119.924999 79.924999 135.075001 100.075001)
+    (thickness 1.6)
+    (drawings 15)
+    (tracks 2)
+    (zones 0)
+    (modules 44)
+    (nets 4)
+  )
+
+  (page A4)
+  (layers
+    (0 F.Cu signal)
+    (31 B.Cu signal)
+    (32 B.Adhes user)
+    (33 F.Adhes user)
+    (34 B.Paste user)
+    (35 F.Paste user)
+    (36 B.SilkS user)
+    (37 F.SilkS user)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (41 Cmts.User user)
+    (42 Eco1.User user)
+    (43 Eco2.User user)
+    (44 Edge.Cuts user)
+    (45 Margin user)
+    (46 B.CrtYd user)
+    (47 F.CrtYd user)
+    (48 B.Fab user)
+    (49 F.Fab user)
+  )
+
+  (setup
+    (last_trace_width 0.25)
+    (user_trace_width 0.4)
+    (trace_clearance 0.2)
+    (zone_clearance 0.381)
+    (zone_45_only no)
+    (trace_min 0.2)
+    (segment_width 0.2)
+    (edge_width 0.15)
+    (via_size 0.6)
+    (via_drill 0.4)
+    (via_min_size 0.4)
+    (via_min_drill 0.3)
+    (uvia_size 0.3)
+    (uvia_drill 0.1)
+    (uvias_allowed no)
+    (uvia_min_size 0.2)
+    (uvia_min_drill 0.1)
+    (pcb_text_width 0.3)
+    (pcb_text_size 1.5 1.5)
+    (mod_edge_width 0.15)
+    (mod_text_size 1 1)
+    (mod_text_width 0.15)
+    (pad_size 1.7 1.7)
+    (pad_drill 1)
+    (pad_to_mask_clearance 0.2)
+    (aux_axis_origin 0 0)
+    (visible_elements FFFFFF7F)
+    (pcbplotparams
+      (layerselection 0x00030_80000001)
+      (usegerberextensions false)
+      (excludeedgelayer true)
+      (linewidth 0.100000)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15)
+      (hpglpenoverlay 2)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 1)
+      (scaleselection 1)
+      (outputdirectory ""))
+  )
+
+  (net 0 "")
+  (net 1 "Net-(D1-Pad1)")
+  (net 2 "Net-(D1-Pad2)")
+  (net 3 GNDA)
+
+  (net_class Default "This is the default net class."
+    (clearance 0.2)
+    (trace_width 0.25)
+    (via_dia 0.6)
+    (via_drill 0.4)
+    (uvia_dia 0.3)
+    (uvia_drill 0.1)
+    (add_net GNDA)
+    (add_net "Net-(D1-Pad1)")
+    (add_net "Net-(D1-Pad2)")
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB97F)
+    (at 123 85)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB97A)
+    (at 123 84)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB975)
+    (at 123 83)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB970)
+    (at 124 83)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB96B)
+    (at 125 83)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB966)
+    (at 126 83)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB961)
+    (at 127 83)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB95C)
+    (at 127 84)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB957)
+    (at 127 85)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB952)
+    (at 127 86)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB94D)
+    (at 127 87)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB948)
+    (at 127 88)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB943)
+    (at 127 89)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB93E)
+    (at 127 90)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB939)
+    (at 127 91)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB934)
+    (at 127 92)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB92F)
+    (at 127 93)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB92A)
+    (at 127 94)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB925)
+    (at 127 95)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB920)
+    (at 127 96)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB91B)
+    (at 127 97)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB916)
+    (at 127 98)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB90F)
+    (at 123 86)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB90A)
+    (at 123 87)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB900)
+    (at 123 88)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB8FA)
+    (at 123 89)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB8F3)
+    (at 123 90)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB8ED)
+    (at 123 91)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB8E8)
+    (at 123 92)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB8E3)
+    (at 123 93)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB8DE)
+    (at 123 94)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB8D9)
+    (at 123 95)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB8D4)
+    (at 123 96)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB8CF)
+    (at 123 97)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB8C9)
+    (at 123 98)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB8C4)
+    (at 123 99)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB8BF)
+    (at 124 99)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB8BA)
+    (at 125 99)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB75A)
+    (at 126 99)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Pin_Headers:Pin_Header_Angled_1x01_Pitch2.54mm (layer F.Cu) (tedit 595B5706) (tstamp 595FB4D2)
+    (at 130 92.5 270)
+    (descr "Through hole angled pin header, 1x01, 2.54mm pitch, 6mm pin length, single row")
+    (tags "Through hole angled pin header THT 1x01 2.54mm single row")
+    (path /595A4B36)
+    (fp_text reference J3 (at -2.5 -1.5 360) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value CONN_01X01 (at 4.315 2.27 270) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 1.4 -1.27) (end 1.4 1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.4 1.27) (end 3.9 1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 3.9 1.27) (end 3.9 -1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 3.9 -1.27) (end 1.4 -1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 0 -0.32) (end 0 0.32) (layer F.Fab) (width 0.1))
+    (fp_line (start 0 0.32) (end 9.9 0.32) (layer F.Fab) (width 0.1))
+    (fp_line (start 9.9 0.32) (end 9.9 -0.32) (layer F.Fab) (width 0.1))
+    (fp_line (start 9.9 -0.32) (end 0 -0.32) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.28 -1.39) (end 1.28 1.39) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.28 1.39) (end 4.02 1.39) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.02 1.39) (end 4.02 -1.39) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.02 -1.39) (end 1.28 -1.39) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.28 -1.39) (end 1.28 1.27) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.28 1.27) (end 4.02 1.27) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.02 1.27) (end 4.02 -1.39) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.02 -1.39) (end 1.28 -1.39) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.02 -0.44) (end 4.02 0.44) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.02 0.44) (end 10.02 0.44) (layer F.SilkS) (width 0.12))
+    (fp_line (start 10.02 0.44) (end 10.02 -0.44) (layer F.SilkS) (width 0.12))
+    (fp_line (start 10.02 -0.44) (end 4.02 -0.44) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.97 -0.44) (end 1.28 -0.44) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.97 0.44) (end 1.28 0.44) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.02 -0.32) (end 10.02 -0.32) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.02 -0.2) (end 10.02 -0.2) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.02 -0.08) (end 10.02 -0.08) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.02 0.04) (end 10.02 0.04) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.02 0.16) (end 10.02 0.16) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.02 0.28) (end 10.02 0.28) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.02 0.4) (end 10.02 0.4) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.27 0) (end -1.27 -1.27) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.27 -1.27) (end 0 -1.27) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.6 -1.6) (end -1.6 1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.6 1.6) (end 10.2 1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 10.2 1.6) (end 10.2 -1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 10.2 -1.6) (end -1.6 -1.6) (layer F.CrtYd) (width 0.05))
+    (pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 2 "Net-(D1-Pad2)"))
+    (model Pin_Headers.3dshapes/Pin_Header_Angled_1x01_Pitch2.54mm.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 90))
+    )
+  )
+
+  (module Vias:Stitchging-Via-0.2-0.4 (layer F.Cu) (tedit 595A3C58) (tstamp 595FB742)
+    (at 127 99)
+    (fp_text reference REF** (at 0 1.27) (layer F.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Stitching-Via-0.2-0.4 (at 0 -1.27) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad ~ thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.2) (layers *.Cu)
+      (net 3 GNDA) (zone_connect 2))
+  )
+
+  (module Photodiodes:BPW34FA_w_Silks (layer F.Cu) (tedit 595B5774) (tstamp 595B59D8)
+    (at 127.5 85)
+    (path /595A4990)
+    (fp_text reference D1 (at 0 -3.75) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value D_Photo (at 0 -3.81) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole circle (at -2.5 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
+      (net 1 "Net-(D1-Pad1)"))
+    (pad 2 thru_hole circle (at 2.5 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask)
+      (net 2 "Net-(D1-Pad2)"))
+  )
+
+  (module WithoutSilkscreen:Pin_Header_Angled_1x01_Pitch2.54mm_W_Silkscreen (layer F.Cu) (tedit 595B7CB4) (tstamp 595B8012)
+    (at 122 92.5 270)
+    (descr "Through hole angled pin header, 1x01, 2.54mm pitch, 6mm pin length, single row")
+    (tags "Through hole angled pin header THT 1x01 2.54mm single row")
+    (path /595A4E84)
+    (fp_text reference J1 (at -2.5 -3.5 360) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value CONN_01X01 (at 4.315 2.27 270) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 1.4 -1.27) (end 1.4 1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.4 1.27) (end 3.9 1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 3.9 1.27) (end 3.9 -1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 3.9 -1.27) (end 1.4 -1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 0 -0.32) (end 0 0.32) (layer F.Fab) (width 0.1))
+    (fp_line (start 0 0.32) (end 9.9 0.32) (layer F.Fab) (width 0.1))
+    (fp_line (start 9.9 0.32) (end 9.9 -0.32) (layer F.Fab) (width 0.1))
+    (fp_line (start 9.9 -0.32) (end 0 -0.32) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 -1.6) (end -1.6 1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.6 1.6) (end 10.2 1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 10.2 1.6) (end 10.2 -1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 10.2 -1.6) (end -1.6 -1.6) (layer F.CrtYd) (width 0.05))
+    (pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 3 GNDA))
+    (model Pin_Headers.3dshapes/Pin_Header_Angled_1x01_Pitch2.54mm.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 90))
+    )
+  )
+
+  (module WithoutSilkscreen:Pin_Header_Angled_1x01_Pitch2.54mm_W_Silkscreen (layer F.Cu) (tedit 595B7CB4) (tstamp 595B8023)
+    (at 125 92.5 270)
+    (descr "Through hole angled pin header, 1x01, 2.54mm pitch, 6mm pin length, single row")
+    (tags "Through hole angled pin header THT 1x01 2.54mm single row")
+    (path /595A4E1F)
+    (fp_text reference J2 (at -2.5 -3.5 360) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value CONN_01X01 (at 4.315 2.27 270) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 1.4 -1.27) (end 1.4 1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.4 1.27) (end 3.9 1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 3.9 1.27) (end 3.9 -1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 3.9 -1.27) (end 1.4 -1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 0 -0.32) (end 0 0.32) (layer F.Fab) (width 0.1))
+    (fp_line (start 0 0.32) (end 9.9 0.32) (layer F.Fab) (width 0.1))
+    (fp_line (start 9.9 0.32) (end 9.9 -0.32) (layer F.Fab) (width 0.1))
+    (fp_line (start 9.9 -0.32) (end 0 -0.32) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 -1.6) (end -1.6 1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.6 1.6) (end 10.2 1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 10.2 1.6) (end 10.2 -1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 10.2 -1.6) (end -1.6 -1.6) (layer F.CrtYd) (width 0.05))
+    (pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 1 "Net-(D1-Pad1)"))
+    (model Pin_Headers.3dshapes/Pin_Header_Angled_1x01_Pitch2.54mm.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 90))
+    )
+  )
+
+  (dimension 3 (width 0.3) (layer Dwgs.User)
+    (gr_text "3,0 mm" (at 127 76.25) (layer Dwgs.User)
+      (effects (font (size 1.5 1.5) (thickness 0.3)))
+    )
+    (feature1 (pts (xy 125 92.5) (xy 125 77.05)))
+    (feature2 (pts (xy 122 92.5) (xy 122 77.05)))
+    (crossbar (pts (xy 122 79.75) (xy 125 79.75)))
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+    (arrow2b (pts (xy 122 79.75) (xy 123.126504 79.163579)))
+  )
+  (gr_text "Photodiode Extender" (at 133 90 90) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.2)))
+  )
+  (gr_text "5.84 + 2.54 + 1.52 = 9.9\n9.9  - 7.5 = 2.4\n2.4 - 1.6 = 0.8  \nThis is the length the headers will stand out with." (at 114.5 108.5) (layer Dwgs.User)
+    (effects (font (size 1.5 1.5) (thickness 0.3)) (justify left))
+  )
+  (dimension 7.5 (width 0.3) (layer Dwgs.User)
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+      (effects (font (size 1.5 1.5) (thickness 0.3)))
+    )
+    (feature1 (pts (xy 122 92.5) (xy 116.3 92.5)))
+    (feature2 (pts (xy 122 100) (xy 116.3 100)))
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+    (arrow2b (pts (xy 119 100) (xy 118.413579 98.873496)))
+  )
+  (gr_line (start 122.5 100) (end 132.5 100) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 120 82.5) (end 120 97.5) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 132.5 80) (end 122.5 80) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 135 82.5) (end 135 97.5) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_arc (start 122.5 97.5) (end 122.5 100) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_arc (start 132.5 97.5) (end 135 97.5) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_arc (start 122.5 82.5) (end 120 82.5) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (gr_arc (start 132.5 82.5) (end 132.5 80) (angle 90) (layer Edge.Cuts) (width 0.15))
+  (dimension 15 (width 0.3) (layer Dwgs.User)
+    (gr_text "15,000 mm" (at 113.65 92.5 270) (layer Dwgs.User)
+      (effects (font (size 1.5 1.5) (thickness 0.3)))
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+    (feature1 (pts (xy 130 100) (xy 112.3 100)))
+    (feature2 (pts (xy 130 85) (xy 112.3 85)))
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+    (arrow2b (pts (xy 115 85) (xy 115.586421 86.126504)))
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+  (dimension 15 (width 0.3) (layer Dwgs.User)
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+      (effects (font (size 1.5 1.5) (thickness 0.3)))
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+    (feature1 (pts (xy 135 80) (xy 135 75)))
+    (feature2 (pts (xy 120 80) (xy 120 75)))
+    (crossbar (pts (xy 120 75) (xy 135 75)))
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+    (arrow2b (pts (xy 120 75) (xy 121.126504 74.413579)))
+  )
+  (dimension 20 (width 0.3) (layer Dwgs.User)
+    (gr_text "20,000 mm" (at 146.35 90 270) (layer Dwgs.User)
+      (effects (font (size 1.5 1.5) (thickness 0.3)))
+    )
+    (feature1 (pts (xy 135 100) (xy 147.7 100)))
+    (feature2 (pts (xy 135 80) (xy 147.7 80)))
+    (crossbar (pts (xy 145 80) (xy 145 100)))
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+    (arrow2b (pts (xy 145 80) (xy 145.586421 81.126504)))
+  )
+
+  (segment (start 125 85) (end 125 92.5) (width 0.4) (layer F.Cu) (net 1))
+  (segment (start 130 85) (end 130 92.5) (width 0.4) (layer F.Cu) (net 2))
+
+  (zone (net 3) (net_name GNDA) (layer F.Cu) (tstamp 595FB6E5) (hatch edge 0.508)
+    (connect_pads yes (clearance 0.381))
+    (min_thickness 0.2)
+    (fill yes (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.5))
+    (polygon
+      (pts
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+    (connect_pads (clearance 0.381))
+    (min_thickness 0.254)
+    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
+    (polygon
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+      (pts
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+      )
+    )
+  )
+)

pcbs/photodiode_extender/photodiode_extender.net

@@ -0,0 +1,87 @@
+(export (version D)
+  (design
+    (source /home/maximilian/UppSense/pcbs/photodiode_extender/photodiode_extender.sch)
+    (date "tis  4 jul 2017 13:35:54")
+    (tool "Eeschema 4.0.6-e0-6349~52~ubuntu17.04.1")
+    (sheet (number 1) (name /) (tstamps /)
+      (title_block
+        (title)
+        (company)
+        (rev)
+        (date)
+        (source photodiode_extender.sch)
+        (comment (number 1) (value ""))
+        (comment (number 2) (value ""))
+        (comment (number 3) (value ""))
+        (comment (number 4) (value "")))))
+  (components
+    (comp (ref D1)
+      (value D_Photo)
+      (footprint Photodiodes:BPW34FA_w_Silks)
+      (libsource (lib device) (part D_Photo))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 595A4990))
+    (comp (ref J3)
+      (value CONN_01X01)
+      (footprint Pin_Headers:Pin_Header_Angled_1x01_Pitch2.54mm)
+      (datasheet http://suddendocs.samtec.com/catalog_english/tsw_th.pdf)
+      (fields
+        (field (name Samtec) TSW-101-08-G-S-RA))
+      (libsource (lib conn) (part CONN_01X01))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 595A4B36))
+    (comp (ref J2)
+      (value CONN_01X01)
+      (footprint WithoutSilkscreen:Pin_Header_Angled_1x01_Pitch2.54mm_W_Silkscreen)
+      (datasheet http://suddendocs.samtec.com/catalog_english/tsw_th.pdf)
+      (fields
+        (field (name Samtec) TSW-101-08-G-S-RA))
+      (libsource (lib conn) (part CONN_01X01))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 595A4E1F))
+    (comp (ref J1)
+      (value CONN_01X01)
+      (footprint WithoutSilkscreen:Pin_Header_Angled_1x01_Pitch2.54mm_W_Silkscreen)
+      (datasheet http://suddendocs.samtec.com/catalog_english/tsw_th.pdf)
+      (fields
+        (field (name Samtec) TSW-101-08-G-S-RA))
+      (libsource (lib conn) (part CONN_01X01))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 595A4E84)))
+  (libparts
+    (libpart (lib conn) (part CONN_01X01)
+      (description "Connector, single row, 01x01, pin header")
+      (footprints
+        (fp Pin_Header_Straight_1X*)
+        (fp Pin_Header_Angled_1X*)
+        (fp Socket_Strip_Straight_1X*)
+        (fp Socket_Strip_Angled_1X*))
+      (fields
+        (field (name Reference) J)
+        (field (name Value) CONN_01X01))
+      (pins
+        (pin (num 1) (name P1) (type passive))))
+    (libpart (lib device) (part D_Photo)
+      (description Photodiode)
+      (footprints
+        (fp *photodiode*))
+      (fields
+        (field (name Reference) D)
+        (field (name Value) D_Photo))
+      (pins
+        (pin (num 1) (name K) (type passive))
+        (pin (num 2) (name A) (type passive)))))
+  (libraries
+    (library (logical conn)
+      (uri /usr/share/kicad/library/conn.lib))
+    (library (logical device)
+      (uri /usr/share/kicad/library/device.lib)))
+  (nets
+    (net (code 1) (name "Net-(D1-Pad1)")
+      (node (ref D1) (pin 1))
+      (node (ref J2) (pin 1)))
+    (net (code 2) (name "Net-(D1-Pad2)")
+      (node (ref D1) (pin 2))
+      (node (ref J3) (pin 1)))
+    (net (code 3) (name GNDA)
+      (node (ref J1) (pin 1)))))

pcbs/photodiode_extender/photodiode_extender.pro

@@ -0,0 +1,60 @@
+update=mån  3 jul 2017 14:18:02
+version=1
+last_client=kicad
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=power
+LibName2=device
+LibName3=transistors
+LibName4=conn
+LibName5=linear
+LibName6=regul
+LibName7=74xx
+LibName8=cmos4000
+LibName9=adc-dac
+LibName10=memory
+LibName11=xilinx
+LibName12=microcontrollers
+LibName13=dsp
+LibName14=microchip
+LibName15=analog_switches
+LibName16=motorola
+LibName17=texas
+LibName18=intel
+LibName19=audio
+LibName20=interface
+LibName21=digital-audio
+LibName22=philips
+LibName23=display
+LibName24=cypress
+LibName25=siliconi
+LibName26=opto
+LibName27=atmel
+LibName28=contrib
+LibName29=valves
+[general]
+version=1

pcbs/photodiode_extender/photodiode_extender.sch

@@ -0,0 +1,114 @@
+EESchema Schematic File Version 2
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+LIBS:photodiode_extender-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L D_Photo D1
+U 1 1 595A4990
+P 5775 2950
+F 0 "D1" H 5795 3020 50  0000 L CNN
+F 1 "D_Photo" H 5735 2840 50  0000 C CNN
+F 2 "Photodiodes:BPW34FA_w_Silks" H 5725 2950 50  0001 C CNN
+F 3 "" H 5725 2950 50  0001 C CNN
+	1    5775 2950
+	1    0    0    -1  
+$EndComp
+$Comp
+L CONN_01X01 J3
+U 1 1 595A4B36
+P 6175 3150
+F 0 "J3" H 6175 3250 50  0000 C CNN
+F 1 "CONN_01X01" V 6275 3150 50  0000 C CNN
+F 2 "Pin_Headers:Pin_Header_Angled_1x01_Pitch2.54mm" H 6175 3150 50  0001 C CNN
+F 3 "http://suddendocs.samtec.com/catalog_english/tsw_th.pdf" H 6175 3150 50  0001 C CNN
+F 4 "TSW-101-08-G-S-RA" H 6175 3150 60  0001 C CNN "Samtec"
+	1    6175 3150
+	0    1    1    0   
+$EndComp
+$Comp
+L GNDA #PWR01
+U 1 1 595A4D22
+P 4300 3100
+F 0 "#PWR01" H 4300 2850 50  0001 C CNN
+F 1 "GNDA" H 4300 2950 50  0000 C CNN
+F 2 "" H 4300 3100 50  0001 C CNN
+F 3 "" H 4300 3100 50  0001 C CNN
+	1    4300 3100
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	4300 2875 4300 3100
+Wire Wire Line
+	5350 2950 5575 2950
+Wire Wire Line
+	5875 2950 6175 2950
+$Comp
+L CONN_01X01 J2
+U 1 1 595A4E1F
+P 5350 3150
+F 0 "J2" H 5350 3250 50  0000 C CNN
+F 1 "CONN_01X01" V 5450 3150 50  0000 C CNN
+F 2 "WithoutSilkscreen:Pin_Header_Angled_1x01_Pitch2.54mm_W_Silkscreen" H 5350 3150 50  0001 C CNN
+F 3 "http://suddendocs.samtec.com/catalog_english/tsw_th.pdf" H 5350 3150 50  0001 C CNN
+F 4 "TSW-101-08-G-S-RA" H 5350 3150 60  0001 C CNN "Samtec"
+	1    5350 3150
+	0    1    1    0   
+$EndComp
+$Comp
+L CONN_01X01 J1
+U 1 1 595A4E84
+P 4750 3150
+F 0 "J1" H 4750 3250 50  0000 C CNN
+F 1 "CONN_01X01" V 4850 3150 50  0000 C CNN
+F 2 "WithoutSilkscreen:Pin_Header_Angled_1x01_Pitch2.54mm_W_Silkscreen" H 4750 3150 50  0001 C CNN
+F 3 "http://suddendocs.samtec.com/catalog_english/tsw_th.pdf" H 4750 3150 50  0001 C CNN
+F 4 "TSW-101-08-G-S-RA" H 4750 3150 60  0001 C CNN "Samtec"
+	1    4750 3150
+	0    1    1    0   
+$EndComp
+Wire Wire Line
+	4750 2950 4750 2875
+Wire Wire Line
+	4750 2875 4300 2875
+$EndSCHEMATC