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Started working on a backplane.

master
Maximilian Stiefel 8 years ago
parent
1558b6836e
commit
324fff5b20
37 changed files with 13408 additions and 6464 deletions
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  1. 5
      cad/etching_machine/v2.0/dimensions.scad
  2. 9
      cad/etching_machine/v2.0/pcb_holder_crossbar.scad
  3. 72
      cad/etching_machine/v2.0/pcb_holder_crossbar.stl
  4. 2637
      cad/etching_machine/v2.0/pcb_holder_crossbar.svg
  5. 392
      cad/etching_machine/v2.0/pcb_holder_floor_prot.stl
  6. 2887
      cad/etching_machine/v2.0/pcb_holder_holder.svg
  7. 2
      cad/etching_machine/v2.0/pcb_holder_holder_l.scad
  8. 284
      cad/etching_machine/v2.0/pcb_holder_holder_l.stl
  9. 77
      cad/etching_machine/v2.0/pcb_holder_holder_r.scad
  10. 1206
      cad/etching_machine/v2.0/pcb_holder_holder_r.stl
  11. 2
      cad/etching_machine/v2.0/pcb_holder_lid.scad
  12. 736
      cad/etching_machine/v2.0/pcb_holder_lid.stl
  13. 2861
      cad/etching_machine/v2.0/pcb_holder_lid.svg
  14. 45
      ltspice/uv_led_driver/LM324.txt
  15. 2
      ltspice/uv_led_driver/clean.sh
  16. 57
      ltspice/uv_led_driver/driver_option1.asc
  17. 133
      ltspice/uv_led_driver/driver_option2.asc
  18. 9
      pcbs/analog_board/Logo.pretty/UU.kicad_mod
  19. 46
      pcbs/analog_board/lowCurrent.bak
  20. 921
      pcbs/analog_board/output/analog_board-B.Cu.ps
  21. 4748
      pcbs/analog_board/output/analog_board-F.Cu.ps
  22. BIN
      pcbs/analog_board/output/analog_board.png
  23. 154
      pcbs/backplane/backplane-cache.lib
  24. 219
      pcbs/backplane/backplane.bak
  25. 705
      pcbs/backplane/backplane.kicad_pcb
  26. 681
      pcbs/backplane/backplane.kicad_pcb-bak
  27. 289
      pcbs/backplane/backplane.net
  28. 72
      pcbs/backplane/backplane.pro
  29. 219
      pcbs/backplane/backplane.sch
  30. 11
      pcbs/backplane/mates_to_fit_backplane
  31. 39
      pcbs/backplane/myLibs/ft232rl.lib
  32. 57
      pcbs/backplane/myLibs/silabs.dcm
  33. 253
      pcbs/backplane/myLibs/silabs.lib
  34. 17
      pcbs/backplane/myUSB.pretty/USB3075-30-A.kicad_mod
  35. 25
      pcbs/backplane/myUSB.pretty/USB3145-30-1-A.kicad_mod
  36. BIN
      pcbs/backplane/output/electrical_spec_interface.pdf
  37. BIN
      pcbs/backplane/output/mechanical_spec_interface.pdf

5
cad/etching_machine/v2.0/dimensions.scad
View File

@ -19,8 +19,8 @@ holder_depth = 8;
notch_height = 161;
// Calculations to construct a triangle which can take a PCB
biggest_pcb = 2;
c = biggest_pcb + 1;
x = c/sqrt(2);
c = biggest_pcb + allowance05;
x = c;
y = sqrt( pow(x,2) - pow(c/2,2) );
// Dimensions cuvette
@ -53,6 +53,7 @@ service_hole_height = lid_height;
// Dimensions crossbar
crossbar_height = 2.5 + allowance05;
crossbar_width = 8 + allowance05;
crossbar_depth = slot_width;
// Dimensions lid
lid_thickness = 4;

9
cad/etching_machine/v2.0/pcb_holder_crossbar.scad
View File

@ -6,13 +6,12 @@
/////////////////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////////////////
// Vars
// Includes
/////////////////////////////////////////////////////////////////////////////////
crossbar_depth = 175;
crossbar_height = 5;
crossbar_width = 5;
include <dimensions.scad>
use <dimensions.scad>
/////////////////////////////////////////////////////////////////////////////////
// Action
/////////////////////////////////////////////////////////////////////////////////
cube([crossbar_width, crossbar_depth, crossbar_height], center = true);
cube([crossbar_width - allowance05, crossbar_depth, crossbar_height - allowance05], center = true);

72
cad/etching_machine/v2.0/pcb_holder_crossbar.stl
View File

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2637
cad/etching_machine/v2.0/pcb_holder_crossbar.svg
View File

File diff suppressed because one or more lines are too long
Side by Side Swipe Overlay

Before

Width:  |  Height:  |  Size: 130 KiB

After

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392
cad/etching_machine/v2.0/pcb_holder_floor_prot.stl
View File

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2887
cad/etching_machine/v2.0/pcb_holder_holder.svg
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2
cad/etching_machine/v2.0/pcb_holder_holder_l.scad
View File

@ -40,7 +40,7 @@ difference()
cube([bar_width, bar_depth, bar_height]);
// Text
translate([holder_width/2 + 3, holder_depth, 0.2*holder_height])
translate([holder_width/2 + 4, holder_depth, 0.2*holder_height])
rotate([90,0,180])
linear_extrude(height = 3, center = true, convexity = 10, twist = 0)
text("L", size = 10, valign = "center");

284
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@ -7388,7 +7395,7 @@ solid OpenSCAD_Model
outer loop
vertex 4.75 0 167.75
vertex 4.5 0 5.5
vertex 7.51 0 166.5
vertex 7.75577 0 166.5
endloop
endfacet
facet normal 0 -1 0
@ -7407,14 +7414,7 @@ solid OpenSCAD_Model
endfacet
facet normal 0 -1 0
outer loop
vertex 4.5 0 4.5
vertex 4.75 0 4.25
vertex 13.5 0 4.5
endloop
endfacet
facet normal 0 -1 0
outer loop
vertex 4.5 0 4.5
vertex 4.5 0 4.25
vertex 4.75 0 1.25
vertex 4.75 0 4.25
endloop
@ -7428,7 +7428,7 @@ solid OpenSCAD_Model
endfacet
facet normal 0 -1 -0
outer loop
vertex 4.5 0 4.5
vertex 4.5 0 4.25
vertex 0 0 0
vertex 4.75 0 1.25
endloop
@ -7437,7 +7437,7 @@ solid OpenSCAD_Model
outer loop
vertex 4.5 0 5.5
vertex 0 0 0
vertex 4.5 0 4.5
vertex 4.5 0 4.25
endloop
endfacet
facet normal 0 -1 0
@ -7456,21 +7456,21 @@ solid OpenSCAD_Model
endfacet
facet normal 0 -1 0
outer loop
vertex 10.49 0 166.5
vertex 10.2442 0 166.5
vertex 13.25 0 167.75
vertex 7.51 0 166.5
vertex 7.75577 0 166.5
endloop
endfacet
facet normal 0 -1 0
outer loop
vertex 13.5 0 5.5
vertex 10.49 0 166.5
vertex 10.49 0 5.5
vertex 10.2442 0 166.5
vertex 10.2442 0 5.5
endloop
endfacet
facet normal 0 -1 0
outer loop
vertex 10.49 0 166.5
vertex 10.2442 0 166.5
vertex 13.5 0 5.5
vertex 13.25 0 167.75
endloop
@ -7486,21 +7486,7 @@ solid OpenSCAD_Model
outer loop
vertex 18 0 0
vertex 13.5 0 5.5
vertex 13.5 0 4.5
endloop
endfacet
facet normal 0 -1 0
outer loop
vertex 13.25 0 4.25
vertex 13.5 0 4.5
vertex 4.75 0 4.25
endloop
endfacet
facet normal 0 -1 0
outer loop
vertex 13.25 0 1.25
vertex 13.5 0 4.5
vertex 13.25 0 4.25
vertex 13.5 0 4.25
endloop
endfacet
facet normal 0 -1 0
@ -7514,7 +7500,7 @@ solid OpenSCAD_Model
outer loop
vertex 13.25 0 1.25
vertex 18 0 0
vertex 13.5 0 4.5
vertex 13.5 0 4.25
endloop
endfacet
facet normal 0 -1 0
@ -7526,9 +7512,9 @@ solid OpenSCAD_Model
endfacet
facet normal 0 -1 -0
outer loop
vertex 7.51 0 166.5
vertex 7.75577 0 166.5
vertex 4.5 0 5.5
vertex 7.51 0 5.5
vertex 7.75577 0 5.5
endloop
endfacet
facet normal -1 0 0
@ -7832,20 +7818,6 @@ solid OpenSCAD_Model
vertex 5.11623 4.95726 176.5
endloop
endfacet
facet normal -0.885456 -0.464723 0
outer loop
vertex 6.00596 1.34751 172
vertex 5.11623 3.04274 176.5
vertex 5.11623 3.04274 172
endloop
endfacet
facet normal -0.885456 -0.464723 0
outer loop
vertex 5.11623 3.04274 176.5
vertex 6.00596 1.34751 172
vertex 6.00596 1.34751 176.5
endloop
endfacet
facet normal 0.748511 -0.663123 0
outer loop
vertex 11.2723 0.708064 176.5
@ -7902,123 +7874,193 @@ solid OpenSCAD_Model
vertex 7.58158 0.259934 172
endloop
endfacet
facet normal -0.885456 -0.464723 0
outer loop
vertex 6.00596 1.34751 172
vertex 5.11623 3.04274 176.5
vertex 5.11623 3.04274 172
endloop
endfacet
facet normal -0.885456 -0.464723 0
outer loop
vertex 5.11623 3.04274 176.5
vertex 6.00596 1.34751 172
vertex 6.00596 1.34751 176.5
endloop
endfacet
facet normal -1 0 0
outer loop
vertex 4.5 -5 4.5
vertex 4.5 -6 4.25
vertex 4.5 0 5.5
vertex 4.5 0 4.5
vertex 4.5 0 4.25
endloop
endfacet
facet normal -1 -0 0
outer loop
vertex 4.5 0 5.5
vertex 4.5 -5 4.5
vertex 4.5 -5 5.5
vertex 4.5 -6 4.25
vertex 4.5 -6 5.5
endloop
endfacet
facet normal 0 0 1
outer loop
vertex 7.51 0 5.5
vertex 7.75577 0 5.5
vertex 4.5 0 5.5
vertex 7.5 -0.00999928 5.5
vertex 7.75 -0.00999928 5.5
endloop
endfacet
facet normal 0 0 1
outer loop
vertex 13.5 0 5.5
vertex 10.5 -0.00999928 5.5
vertex 13.5 -5 5.5
vertex 10.25 -0.00999928 5.5
vertex 13.5 -6 5.5
endloop
endfacet
facet normal 0 -0 1
outer loop
vertex 10.5 -0.00999928 5.5
vertex 10.25 -0.00999928 5.5
vertex 13.5 0 5.5
vertex 10.49 0 5.5
vertex 10.2442 0 5.5
endloop
endfacet
facet normal -0 0 1
outer loop
vertex 7.5 -0.00999928 5.5
vertex 13.5 -5 5.5
vertex 10.5 -0.00999928 5.5
vertex 7.75 -0.00999928 5.5
vertex 13.5 -6 5.5
vertex 10.25 -0.00999928 5.5
endloop
endfacet
facet normal 0 0 1
outer loop
vertex 4.5 -5 5.5
vertex 7.5 -0.00999928 5.5
vertex 4.5 -6 5.5
vertex 7.75 -0.00999928 5.5
vertex 4.5 0 5.5
endloop
endfacet
facet normal 0 0 1
outer loop
vertex 7.5 -0.00999928 5.5
vertex 4.5 -5 5.5
vertex 13.5 -5 5.5
vertex 7.75 -0.00999928 5.5
vertex 4.5 -6 5.5
vertex 13.5 -6 5.5
endloop
endfacet
facet normal 0 0 1
outer loop
vertex 7.51 0 5.5
vertex 10.49 0 5.5
vertex 9 1.48998 5.5
vertex 7.75577 0 5.5
vertex 10.2442 0 5.5
vertex 9 2.15505 5.5
endloop
endfacet
facet normal 0 0 1
facet normal -0 0 1
outer loop
vertex 10.49 0 5.5
vertex 7.51 0 5.5
vertex 10.5 -0.00999928 5.5
vertex 7.75577 0 5.5
vertex 10.25 -0.00999928 5.5
vertex 10.2442 0 5.5
endloop
endfacet
facet normal 0 0 1
outer loop
vertex 10.5 -0.00999928 5.5
vertex 7.51 0 5.5
vertex 7.5 -0.00999928 5.5
vertex 10.25 -0.00999928 5.5
vertex 7.75577 0 5.5
vertex 7.75 -0.00999928 5.5
endloop
endfacet
facet normal 1 -0 0
outer loop
vertex 13.5 -5 5.5
vertex 13.5 0 4.5
vertex 13.5 -6 5.5
vertex 13.5 0 4.25
vertex 13.5 0 5.5
endloop
endfacet
facet normal 1 0 0
outer loop
vertex 13.5 0 4.5
vertex 13.5 -5 5.5
vertex 13.5 -5 4.5
vertex 13.5 0 4.25
vertex 13.5 -6 5.5
vertex 13.5 -6 4.25
endloop
endfacet
facet normal 0 0 -1
outer loop
vertex 13.5 -6 4.25
vertex 13.25 -1 4.25
vertex 13.5 0 4.25
endloop
endfacet
facet normal 0 0 -1
outer loop
vertex 13.5 -6 4.25
vertex 4.75 -1 4.25
vertex 13.25 -1 4.25
endloop
endfacet
facet normal 0 0 -1
outer loop
vertex 4.5 -6 4.25
vertex 4.75 -1 4.25
vertex 13.5 -6 4.25
endloop
endfacet
facet normal 0 0 -1
outer loop
vertex 4.5 0 4.25
vertex 4.75 -1 4.25
vertex 4.5 -6 4.25
endloop
endfacet
facet normal 0 0 -1
outer loop
vertex 4.75 -1 4.25
vertex 4.5 0 4.25
vertex 4.75 0 4.25
endloop
endfacet
facet normal -0 0 -1
outer loop
vertex 13.5 0 4.25
vertex 13.25 -1 4.25
vertex 13.25 0 4.25
endloop
endfacet
facet normal 0 0 -1
outer loop
vertex 4.75 0 4.25
vertex 13.25 0 4.25
vertex 13.25 -1 4.25
endloop
endfacet
facet normal 0 0 -1
outer loop
vertex 4.75 0 4.25
vertex 13.25 -1 4.25
vertex 4.75 -1 4.25
endloop
endfacet
facet normal 0 0 -1
outer loop
vertex 4.5 -5 4.5
vertex 13.5 0 4.5
vertex 13.5 -5 4.5
vertex 13.25 0 4.25
vertex 4.75 0 4.25
vertex 13.25 8 4.25
endloop
endfacet
facet normal -0 0 -1
outer loop
vertex 13.5 0 4.5
vertex 4.5 -5 4.5
vertex 4.5 0 4.5
vertex 13.25 8 4.25
vertex 4.75 0 4.25
vertex 4.75 8 4.25
endloop
endfacet
facet normal 0 -1 0
outer loop
vertex 4.5 -5 4.5
vertex 13.5 -5 5.5
vertex 4.5 -5 5.5
vertex 4.5 -6 4.25
vertex 13.5 -6 5.5
vertex 4.5 -6 5.5
endloop
endfacet
facet normal 0 -1 -0
outer loop
vertex 13.5 -5 5.5
vertex 4.5 -5 4.5
vertex 13.5 -5 4.5
vertex 13.5 -6 5.5
vertex 4.5 -6 4.25
vertex 13.5 -6 4.25
endloop
endfacet
facet normal 0 1 0
@ -27600,39 +27642,39 @@ solid OpenSCAD_Model
vertex -0.999999 2.5625 100.406
endloop
endfacet
facet normal -0.707103 -0.707111 0
facet normal -0.866024 -0.500002 0
outer loop
vertex 9 1.48998 5.5
vertex 10.49 0 166.5
vertex 9 1.48998 166.5
vertex 10.2442 0 5.5
vertex 9 2.15505 166.5
vertex 9 2.15505 5.5
endloop
endfacet
facet normal -0.707103 -0.707111 -0
facet normal -0.866024 -0.500002 0
outer loop
vertex 10.49 0 166.5
vertex 9 1.48998 5.5
vertex 10.49 0 5.5
vertex 9 2.15505 166.5
vertex 10.2442 0 5.5
vertex 10.2442 0 166.5
endloop
endfacet
facet normal 0.707103 -0.707111 0
facet normal 0 -0 -1
outer loop
vertex 7.51 0 5.5
vertex 9 1.48998 166.5
vertex 7.51 0 166.5
vertex 9 2.15505 166.5
vertex 10.2442 0 166.5
vertex 7.75577 0 166.5
endloop
endfacet
facet normal 0.707103 -0.707111 0
facet normal 0.866024 -0.500002 0
outer loop
vertex 9 1.48998 166.5
vertex 7.51 0 5.5
vertex 9 1.48998 5.5
vertex 7.75577 0 166.5
vertex 9 2.15505 5.5
vertex 9 2.15505 166.5
endloop
endfacet
facet normal 0 -0 -1
facet normal 0.866024 -0.500002 0
outer loop
vertex 9 1.48998 166.5
vertex 10.49 0 166.5
vertex 7.51 0 166.5
vertex 9 2.15505 5.5
vertex 7.75577 0 166.5
vertex 7.75577 0 5.5
endloop
endfacet
facet normal 1 0 0
@ -27698,20 +27740,6 @@ solid OpenSCAD_Model
vertex 4.75 4 1.5
endloop
endfacet
facet normal 0 0 -1
outer loop
vertex 4.75 0 4.25
vertex 13.25 8 4.25
vertex 13.25 0 4.25
endloop
endfacet
facet normal -0 0 -1
outer loop
vertex 13.25 8 4.25
vertex 4.75 0 4.25
vertex 4.75 8 4.25
endloop
endfacet
facet normal -1 0 0
outer loop
vertex 13.25 0 1.25

77
cad/etching_machine/v2.0/pcb_holder_holder_r.scad
View File

@ -6,60 +6,15 @@
/////////////////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////////////////
// Vars
// Includes
/////////////////////////////////////////////////////////////////////////////////
// Dimesions holder
holder_height = 160;
holder_width = 15;
holder_depth = 6;
// Dimensions notch
notch_height = 115;
// Calculations to construct a triangle which can take a PCB
biggest_pcb = 2;
c = biggest_pcb + 1;
x = c/sqrt(2);
y = sqrt( pow(x,2) - pow(c/2,2) );
// General allowance
allowance = 0.5;
// Dimensions crossbar
crossbar_height = 5 + allowance;
crossbar_width = 5 + allowance;
// Dimensions lid
lid_thickness = 4;
lid_slot_width = 8;
// Dimensions neck
neck_diameter = holder_depth;
neck_height = lid_thickness + allowance;
// Dimensions head
head_width = holder_width;
head_depth = holder_depth;
head_height = 5;
// Dimensions bar that PCB does not fall down
bar_width = holder_width/2;
bar_depth = 5;
bar_height = 2;
include <dimensions.scad>
use <dimensions.scad>
// Suitable for M3 screw thread
hole_diameter = 2.5;
// Air system diameter
air_system = 10;
// Height difference between notch for PCB and the actual holder
height_diff_1 = holder_height - notch_height;
// Width difference between crossbar and holder
width_diff_1 = holder_width - crossbar_width;
// My color for everything
myColor = "FireBrick";
/////////////////////////////////////////////////////////////////////////////////
// Vars
/////////////////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////////////////
// Action
@ -85,16 +40,16 @@ difference()
cube([bar_width, bar_depth, bar_height]);
// Text
translate([holder_width/2 + 3, holder_depth, 0.2*holder_height])
translate([holder_width/2 +5, holder_depth, 0.2*holder_height])
rotate([90,0,180])
linear_extrude(height = 3, center = true, convexity = 10, twist = 0)
text("R", size = 10, valign = "center");
translate([holder_width, 0, (1/4)*height_diff_1 + 6])
rotate([90, 0, 90])
translate([holder_width, 1, (1/4)*height_diff_1 + 6])
rotate([90, 0,90])
linear_extrude(height = 2, center = true, convexity = 10, twist = 0)
text("M3", size = 3, valign = "center");
translate([0, holder_depth/2, holder_height/2])
rotate([90, -90, 270])
translate([holder_width, holder_depth/2, holder_height/2])
rotate([90, -90, 90])
linear_extrude(height = 2, center = true, convexity = 10, twist = 0)
text("Maximilian Stiefel 2017", size = 3, valign = "center");
@ -118,16 +73,16 @@ difference()
cube([crossbar_width, holder_depth + 2, crossbar_height], center = false);
// Drill holes for screws
translate([holder_width/2, holder_depth/2, (1/4)*height_diff_1])
translate([holder_width/2 + 1, holder_depth/2, (1/4)*height_diff_1])
rotate([0, 90, 0])
cylinder(h = 9, r = hole_diameter/2);
translate([holder_width/2, holder_depth/2,(3/4)*height_diff_1 + notch_height])
translate([holder_width/2 + 1, holder_depth/2,(3/4)*height_diff_1 + notch_height])
rotate([0, 90, 0])
cylinder(h = 9, r = hole_diameter/2);
// Holes for the air system
translate([holder_width/2, holder_depth + 1, 0])
rotate([90, 0, 0])
cylinder(h = holder_depth + 2, r = air_system/2);
// translate([holder_width/2, holder_depth + 1, 0])
// rotate([90, 0, 0])
// cylinder(h = holder_depth + 2, r = air_system/2);
}
}

1206
cad/etching_machine/v2.0/pcb_holder_holder_r.stl
View File

File diff suppressed because it is too large

2
cad/etching_machine/v2.0/pcb_holder_lid.scad
View File

@ -6,7 +6,7 @@
/////////////////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////////////////
// Include
// Includes
/////////////////////////////////////////////////////////////////////////////////
include <roundy.scad>
use <roundy.scad>

736
cad/etching_machine/v2.0/pcb_holder_lid.stl
View File

File diff suppressed because it is too large

2861
cad/etching_machine/v2.0/pcb_holder_lid.svg
View File

File diff suppressed because one or more lines are too long
Side by Side Swipe Overlay

Before

Width:  |  Height:  |  Size: 141 KiB

After

Width:  |  Height:  |  Size: 88 KiB

45
ltspice/uv_led_driver/LM324.txt
View File

@ -1,45 +0,0 @@
* LM324 OPERATIONAL AMPLIFIER "MACROMODEL" SUBCIRCUIT
* CREATED USING PARTS RELEASE 4.01 ON 09/08/89 AT 10:54
* (REV N/A) SUPPLY VOLTAGE: 5V
* CONNECTIONS: NON-INVERTING INPUT
* | INVERTING INPUT
* | | POSITIVE POWER SUPPLY
* | | | NEGATIVE POWER SUPPLY
* | | | | OUTPUT
* | | | | |
.SUBCKT LM324 1 2 3 4 5
*
C1 11 12 5.544E-12
C2 6 7 20.00E-12
DC 5 53 DX
DE 54 5 DX
DLP 90 91 DX
DLN 92 90 DX
DP 4 3 DX
EGND 99 0 POLY(2) (3,0) (4,0) 0 .5 .5
FB 7 99 POLY(5) VB VC VE VLP VLN 0 15.91E6 -20E6 20E6 20E6 -20E6
GA 6 0 11 12 125.7E-6
GCM 0 6 10 99 7.067E-9
IEE 3 10 DC 10.04E-6
HLIM 90 0 VLIM 1K
Q1 11 2 13 QX
Q2 12 1 14 QX
R2 6 9 100.0E3
RC1 4 11 7.957E3
RC2 4 12 7.957E3
RE1 13 10 2.773E3
RE2 14 10 2.773E3
REE 10 99 19.92E6
RO1 8 5 50
RO2 7 99 50
RP 3 4 30.31E3
VB 9 0 DC 0
VC 3 53 DC 2.100
VE 54 4 DC .6
VLIM 7 8 DC 0
VLP 91 0 DC 40
VLN 0 92 DC 40
.MODEL DX D(IS=800.0E-18)
.MODEL QX PNP(IS=800.0E-18 BF=250)
.ENDS


2
ltspice/uv_led_driver/clean.sh
View File

@ -1,2 +0,0 @@
#!/bin/bash
rm *.net *.log *.raw *.plt

57
ltspice/uv_led_driver/driver_option1.asc
View File

@ -1,57 +0,0 @@
Version 4
SHEET 1 1136 680
WIRE 400 -320 400 -352
WIRE 704 -240 704 -272
WIRE 832 -240 832 -272
WIRE 400 -224 400 -256
WIRE 400 -128 400 -160
WIRE 704 -128 704 -160
WIRE 832 -128 832 -160
WIRE 400 -16 400 -64
WIRE 160 16 16 16
WIRE 336 32 224 32
WIRE 16 112 16 16
WIRE 400 112 400 80
WIRE 400 112 16 112
WIRE 400 128 400 112
WIRE 400 240 400 208
FLAG 704 -128 0
FLAG 704 -272 V+
FLAG 192 0 V+
FLAG 192 64 0
FLAG 832 -272 VSIG
FLAG 832 -128 0
FLAG 160 48 VSIG
FLAG 400 -352 V+
FLAG 400 240 0
SYMBOL Opamps\\opamp2 192 -32 R0
SYMATTR InstName U1
SYMATTR Value LM324
SYMBOL voltage 704 -256 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 18V
SYMBOL npn 336 -16 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL voltage 832 -256 R0
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value ""
SYMBOL LED 384 -128 R0
SYMATTR InstName D1
SYMATTR Value LXHL-BW02
SYMBOL res 384 112 R0
SYMATTR InstName R1
SYMATTR Value 10R
SYMBOL LED 384 -224 R0
SYMATTR InstName D2
SYMATTR Value LXHL-BW02
SYMBOL LED 384 -320 R0
SYMATTR InstName D3
SYMATTR Value LXHL-BW02
TEXT 688 -16 Left 2 !.include LM324.txt
TEXT 14 264 Left 2 !.dc V2 0mV 500mV

133
ltspice/uv_led_driver/driver_option2.asc
View File

@ -1,133 +0,0 @@
Version 4
SHEET 1 1628 680
WIRE 400 -320 400 -352
WIRE -160 -304 -160 -336
WIRE 944 -288 832 -288
WIRE 1056 -288 1024 -288
WIRE 1072 -288 1056 -288
WIRE 1184 -288 1152 -288
WIRE 1200 -288 1184 -288
WIRE 1312 -288 1280 -288
WIRE 1520 -288 1312 -288
WIRE 704 -240 704 -272
WIRE 832 -240 832 -288
WIRE 1056 -240 1056 -288
WIRE 1184 -240 1184 -288
WIRE 1312 -240 1312 -288
WIRE 400 -224 400 -256
WIRE -160 -208 -160 -240
WIRE 832 -144 832 -160
WIRE 1056 -144 1056 -176
WIRE 1056 -144 832 -144
WIRE 1184 -144 1184 -176
WIRE 1184 -144 1056 -144
WIRE 1312 -144 1312 -176
WIRE 1312 -144 1184 -144
WIRE 400 -128 400 -160
WIRE 704 -128 704 -160
WIRE 832 -128 832 -144
WIRE -160 -112 -160 -144
WIRE 400 -16 400 -64
WIRE -160 0 -160 -48
WIRE 160 16 16 16
WIRE -400 32 -544 32
WIRE 336 32 224 32
WIRE -224 48 -336 48
WIRE 16 112 16 16
WIRE 400 112 400 80
WIRE 400 112 16 112
WIRE -544 128 -544 32
WIRE -160 128 -160 96
WIRE -160 128 -544 128
WIRE 400 128 400 112
WIRE -160 144 -160 128
WIRE 400 240 400 208
WIRE -160 256 -160 224
FLAG 704 -128 0
FLAG 704 -272 V+
FLAG 192 0 V+
FLAG 192 64 0
FLAG 1520 -288 VSIG
FLAG 832 -128 0
FLAG 160 48 VSIG
FLAG 400 -352 V+
FLAG 400 240 0
FLAG -368 16 V+
FLAG -368 80 0
FLAG -400 64 VSIG
FLAG -160 -336 V+
FLAG -160 256 0
SYMBOL Opamps\\opamp2 192 -32 R0
SYMATTR InstName U1
SYMATTR Value LM324
SYMBOL voltage 704 -256 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 18V
SYMBOL npn 336 -16 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL voltage 832 -256 R0
WINDOW 3 0 -114 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0V 3.3V 0s 1us 1us {DUTY_CYCLE} 10us)
SYMATTR InstName V2
SYMBOL LED 384 -128 R0
SYMATTR InstName D1
SYMATTR Value LXHL-BW02
SYMBOL res 384 112 R0
SYMATTR InstName R1
SYMATTR Value 10R
SYMBOL LED 384 -224 R0
SYMATTR InstName D2
SYMATTR Value LXHL-BW02
SYMBOL LED 384 -320 R0
SYMATTR InstName D3
SYMATTR Value LXHL-BW02
SYMBOL res 1040 -304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL cap 1040 -240 R0
SYMATTR InstName C1
SYMATTR Value 47n
SYMBOL res 1168 -304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL cap 1168 -240 R0
SYMATTR InstName C2
SYMATTR Value 47n
SYMBOL res 1296 -304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL cap 1296 -240 R0
SYMATTR InstName C3
SYMATTR Value 47n
SYMBOL Opamps\\opamp2 -368 -16 R0
SYMATTR InstName U2
SYMATTR Value LM324
SYMBOL npn -224 0 R0
SYMATTR InstName Q2
SYMATTR Value 2N3904
SYMBOL LED -176 -112 R0
SYMATTR InstName D4
SYMATTR Value LXHL-BW02
SYMBOL res -176 128 R0
SYMATTR InstName R5
SYMATTR Value 10R
SYMBOL LED -176 -208 R0
SYMATTR InstName D5
SYMATTR Value LXHL-BW02
SYMBOL LED -176 -304 R0
SYMATTR InstName D6
SYMATTR Value LXHL-BW02
TEXT -536 544 Left 2 !.include LM324.txt
TEXT -536 416 Left 2 !.tran 100ms
TEXT -536 480 Left 2 !;.step param DUTY_CYCLE list 1us 2us 3us

9
pcbs/analog_board/Logo.pretty/UU.kicad_mod
View File

@ -0,0 +1,9 @@
(module LOGO (layer F.Cu)
(at 0 0)
(fp_text reference "G***" (at 0 0) (layer F.SilkS) hide
(effects (font (thickness 0.3)))
)
(fp_text value "LOGO" (at 0.75 0) (layer F.SilkS) hide
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46
pcbs/analog_board/lowCurrent.bak
View File

@ -188,21 +188,11 @@ Wire Wire Line
Wire Wire Line
6875 4975 6875 5250
Wire Wire Line
6450 3600 6675 3600
6450 3600 7350 3600
Wire Wire Line
6675 3600 6875 3600
6975 2125 6975 2325
Wire Wire Line
6875 3600 7075 3600
Wire Wire Line
7075 3600 7350 3600
Wire Wire Line
6975 2125 6975 2225
Wire Wire Line
6975 2225 6975 2325
Wire Wire Line
6775 2225 6875 2225
Wire Wire Line
6875 2225 6975 2225
6775 2225 6975 2225
Wire Wire Line
6775 2225 6775 2325
Connection ~ 6975 2225
@ -229,9 +219,7 @@ Wire Wire Line
Wire Wire Line
7075 3025 7075 3125
Wire Wire Line
7650 4200 6875 4200
Wire Wire Line
6875 4200 5975 4200
7650 4200 5975 4200
$Comp
L GND #PWR021
U 1 1 59410288
@ -308,11 +296,7 @@ $EndComp
Wire Wire Line
1675 1725 1675 1775
Wire Wire Line
1675 1775 1950 1775
Wire Wire Line
1950 1775 2200 1775
Wire Wire Line
2200 1775 2450 1775
1675 1775 2450 1775
Connection ~ 1950 1775
Connection ~ 2200 1775
$Comp
@ -329,9 +313,7 @@ $EndComp
Wire Wire Line
1950 2075 1950 2150
Wire Wire Line
1950 2075 2200 2075
Wire Wire Line
2200 2075 2450 2075
1950 2075 2450 2075
Connection ~ 2200 2075
Text Notes 1650 2450 0 60 ~ 0
Place decoupling capacitors close to component!
@ -339,13 +321,9 @@ Wire Wire Line
6875 4675 6875 4200
Connection ~ 6875 4200
Wire Wire Line
4100 3600 6075 3600
Wire Wire Line
6075 3600 6150 3600
4100 3600 6150 3600
Wire Wire Line
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Wire Wire Line
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5975 4000 6725 4000
$Comp
L C C10
U 1 1 59421E44
@ -359,16 +337,12 @@ F 4 "1759179" H 6875 4000 60 0001 C CNN "Farnell"
0 1 -1 0
$EndComp
Wire Wire Line
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Wire Wire Line
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6075 3150 6075 4000
Connection ~ 6075 4000
Wire Wire Line
7025 4000 7650 4000
Wire Wire Line
7650 3600 7650 4000
Wire Wire Line
7650 4000 7650 4200
7650 3600 7650 4200
Connection ~ 7650 4000
Text HLabel 5725 3150 0 60 Output ~ 0
BPW34FA_OUT

921
pcbs/analog_board/output/analog_board-B.Cu.ps
View File

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4748
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154
pcbs/backplane/backplane-cache.lib
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EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# CONN_02X04
#
DEF CONN_02X04 P 0 1 Y N 1 F N
F0 "P" 0 250 50 H V C CNN
F1 "CONN_02X04" 0 -250 50 H V C CNN
F2 "" 0 -1200 50 H V C CNN
F3 "" 0 -1200 50 H V C CNN
$FPLIST
Pin_Header_Straight_2X04
Pin_Header_Angled_2X04
Socket_Strip_Straight_2X04
Socket_Strip_Angled_2X04
$ENDFPLIST
DRAW
S -100 -145 -50 -155 0 1 0 N
S -100 -45 -50 -55 0 1 0 N
S -100 55 -50 45 0 1 0 N
S -100 155 -50 145 0 1 0 N
S -100 200 100 -200 0 1 0 N
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X P6 6 250 -50 150 L 50 50 1 1 P
X P7 7 -250 -150 150 R 50 50 1 1 P
X P8 8 250 -150 150 L 50 50 1 1 P
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ENDDEF
#
# CONN_02X09
#
DEF CONN_02X09 P 0 1 Y N 1 F N
F0 "P" 0 500 50 H V C CNN
F1 "CONN_02X09" 0 0 50 V V C CNN
F2 "" 0 -1200 50 H V C CNN
F3 "" 0 -1200 50 H V C CNN
$FPLIST
Pin_Header_Straight_2X09
Pin_Header_Angled_2X09
Socket_Strip_Straight_2X09
Socket_Strip_Angled_2X09
$ENDFPLIST
DRAW
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ENDDEF
#
# FT232RL
#
DEF FT232RL U 0 40 Y Y 1 F N
F0 "U" -750 1200 60 H V C CNN
F1 "FT232RL" 0 0 60 H V C CNN
F2 "" 0 0 60 H I C CNN
F3 "" 0 0 60 H I C CNN
DRAW
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ENDDRAW
ENDDEF
#
# USB_B
#
DEF USB_B P 0 40 Y Y 1 F N
F0 "P" 200 -200 50 H V C CNN
F1 "USB_B" -50 200 50 H V C CNN
F2 "" -50 -100 50 V V C CNN
F3 "" -50 -100 50 V V C CNN
$FPLIST
USB*
$ENDFPLIST
DRAW
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S 95 -150 105 -120 0 1 0 N
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X D+ 3 0 -300 150 U 50 50 1 1 P
X GND 4 100 -300 150 U 50 50 1 1 W
X shield 5 300 100 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
#End Library

219
pcbs/backplane/backplane.bak
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EESchema Schematic File Version 2
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:silabs
LIBS:ft232rl
LIBS:backplane-cache
EELAYER 25 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L CONN_02X04 P1
U 1 1 5948E65F
P 2100 2400
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F 3 "" H 2100 1200 50 0000 C CNN
1 2100 2400
1 0 0 -1
$EndComp
$Comp
L USB_B P4
U 1 1 5948EBA5
P 7200 4300
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F 3 "http://www.farnell.com/datasheets/1841848.pdf" V 7150 4200 50 0001 C CNN
F 4 "2443141" H 7200 4300 60 0001 C CNN "Farnell"
1 7200 4300
-1 0 0 1
$EndComp
$Comp
L CONN_02X09 P3
U 1 1 5948FBD0
P 7500 2500
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F 3 "" H 7500 1300 50 0000 C CNN
1 7500 2500
1 0 0 -1
$EndComp
Text GLabel 1850 2250 0 60 UnSpc ~ 0
Vcc
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ADC1
Text GLabel 1850 2450 0 60 UnSpc ~ 0
ADC2
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ADC3
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GND
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GND
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DAC1
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DAC2
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VCC
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GND
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SPI_MISO
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$Comp
L FT232RL U?
U 1 1 59490896
P 5150 4050
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F 3 "" H 5150 4050 60 0001 C CNN
1 5150 4050
1 0 0 -1
$EndComp
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PWM1
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PWM2
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DAC1
Text GLabel 7750 2400 2 60 UnSpc ~ 0
DAC2
Text GLabel 7750 2500 2 60 UnSpc ~ 0
GPIO1
Text GLabel 7750 2600 2 60 UnSpc ~ 0
GPIO2
Text GLabel 7750 2700 2 60 UnSpc ~ 0
GPIO3
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GPIO4
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UART_TX
$Comp
L CONN_02X04 P?
U 1 1 59490E80
P 2100 3250
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F 3 "" H 2100 2050 50 0000 C CNN
1 2100 3250
1 0 0 -1
$EndComp
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ADC1
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ADC2
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ADC3
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GND
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$Comp
L CONN_02X09 P?
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P 9650 2500
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1 9650 2500
1 0 0 -1
$EndComp
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GND
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SPI_CLK
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SPI_MISO
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UART_TX
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PWM1
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PWM2
Text GLabel 9900 2300 2 60 UnSpc ~ 0
DAC1
Text GLabel 9900 2400 2 60 UnSpc ~ 0
DAC2
Text GLabel 9900 2500 2 60 UnSpc ~ 0
GPIO1
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GPIO2
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GPIO3
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GPIO4
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$EndSCHEMATC

705
pcbs/backplane/backplane.kicad_pcb
View File

@ -0,0 +1,705 @@
(kicad_pcb (version 4) (host pcbnew 4.0.5+dfsg1-4)
(general
(links 32)
(no_connects 32)
(area 40 41.25 197.85 136.350001)
(thickness 1.6)
(drawings 15)
(tracks 0)
(zones 0)
(modules 11)
(nets 21)
)
(page A4)
(title_block
(title "Backplane for UppSense")
(date 2017-06-20)
(rev 1.0)
(company "Uppsala University")
)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user)
(49 F.Fab user)
)
(setup
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(uvias_allowed no)
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(pad_size 1.524 1.524)
(pad_drill 0.762)
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(aux_axis_origin 0 0)
(visible_elements FFFFFF7F)
(pcbplotparams
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(hpglpenoverlay 2)
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(plotreference true)
(plotvalue true)
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(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 1)
(scaleselection 1)
(outputdirectory ""))
)
(net 0 "")
(net 1 VCC)
(net 2 GND)
(net 3 ADC1)
(net 4 ADC2)
(net 5 DAC1)
(net 6 ADC3)
(net 7 DAC2)
(net 8 PWM1)
(net 9 PWM2)
(net 10 SPI_CLK)
(net 11 SPI_MISO)
(net 12 SPI_MOSI)
(net 13 GPIO1)
(net 14 SPI_CS)
(net 15 GPIO2)
(net 16 I2C_SCL)
(net 17 GPIO3)
(net 18 I2C_SDA)
(net 19 GPIO4)
(net 20 UART_TX)
(net_class Default "This is the default net class."
(clearance 0.2)
(trace_width 0.25)
(via_dia 0.6)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net ADC1)
(add_net ADC2)
(add_net ADC3)
(add_net DAC1)
(add_net DAC2)
(add_net GND)
(add_net GPIO1)
(add_net GPIO2)
(add_net GPIO3)
(add_net GPIO4)
(add_net I2C_SCL)
(add_net I2C_SDA)
(add_net PWM1)
(add_net PWM2)
(add_net SPI_CLK)
(add_net SPI_CS)
(add_net SPI_MISO)
(add_net SPI_MOSI)
(add_net UART_TX)
(add_net VCC)
)
(module EuroBoard_Outline:EuroBoard_viertel_Type-I_80mmX50mm (layer F.Cu) (tedit 0) (tstamp 594B9E10)
(at 95 125)
(descr "Outline, Eurocard 1/4, Type I, 80x50mm,")
(tags "Outline, Eurocard 1/4, Type I, 80x50mm,")
(fp_text reference REF** (at 41.00068 -52.99964) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value EuroBoard_viertel_Type-I_80mmX50mm (at 41.9989 5.99948) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0 0) (end 0 -49.9999) (layer Edge.Cuts) (width 0.381))
(fp_line (start 0 -49.9999) (end 79.99984 -49.9999) (layer Edge.Cuts) (width 0.381))
(fp_line (start 79.99984 -49.9999) (end 79.99984 0) (layer Edge.Cuts) (width 0.381))
(fp_line (start 79.99984 0) (end 0 0) (layer Edge.Cuts) (width 0.381))
)
(module Mounting_Holes:MountingHole_3.2mm_M3_DIN965_Pad (layer F.Cu) (tedit 56D1B4CB) (tstamp 594BA990)
(at 100 80)
(descr "Mounting Hole 3.2mm, M3, DIN965")
(tags "mounting hole 3.2mm m3 din965")
(fp_text reference REF** (at 0 -3.8) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value MountingHole_3.2mm_M3_DIN965_Pad (at 0 3.8) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2.8 0) (layer Cmts.User) (width 0.15))
(fp_circle (center 0 0) (end 3.05 0) (layer F.CrtYd) (width 0.05))
(pad 1 thru_hole circle (at 0 0) (size 5.6 5.6) (drill 3.2) (layers *.Cu *.Mask))
)
(module Mounting_Holes:MountingHole_3.2mm_M3_DIN965_Pad (layer F.Cu) (tedit 56D1B4CB) (tstamp 594BA987)
(at 100 120)
(descr "Mounting Hole 3.2mm, M3, DIN965")
(tags "mounting hole 3.2mm m3 din965")
(fp_text reference REF** (at 0 -3.8) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value MountingHole_3.2mm_M3_DIN965_Pad (at 0 3.8) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2.8 0) (layer Cmts.User) (width 0.15))
(fp_circle (center 0 0) (end 3.05 0) (layer F.CrtYd) (width 0.05))
(pad 1 thru_hole circle (at 0 0) (size 5.6 5.6) (drill 3.2) (layers *.Cu *.Mask))
)
(module Mounting_Holes:MountingHole_3.2mm_M3_DIN965_Pad (layer F.Cu) (tedit 56D1B4CB) (tstamp 594BA980)
(at 170 120)
(descr "Mounting Hole 3.2mm, M3, DIN965")
(tags "mounting hole 3.2mm m3 din965")
(fp_text reference REF** (at 0 -3.8) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value MountingHole_3.2mm_M3_DIN965_Pad (at 0 3.8) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2.8 0) (layer Cmts.User) (width 0.15))
(fp_circle (center 0 0) (end 3.05 0) (layer F.CrtYd) (width 0.05))
(pad 1 thru_hole circle (at 0 0) (size 5.6 5.6) (drill 3.2) (layers *.Cu *.Mask))
)
(module Pin_Headers:Pin_Header_Straight_2x04 (layer F.Cu) (tedit 0) (tstamp 594B8A31)
(at 105 110 90)
(descr "Through hole pin header")
(tags "pin header")
(path /5948E65F)
(fp_text reference P1 (at 0 -5.1 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CONN_02X04 (at 0 -3.1 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.75 -1.75) (end -1.75 9.4) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.3 -1.75) (end 4.3 9.4) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 9.4) (end 4.3 9.4) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.27 1.27) (end -1.27 8.89) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 8.89) (end 3.81 8.89) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 8.89) (end 3.81 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 1 VCC))
(pad 2 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 2 GND))
(pad 3 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 3 ADC1))
(pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 2 GND))
(pad 5 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 4 ADC2))
(pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 5 DAC1))
(pad 7 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 6 ADC3))
(pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 7 DAC2))
(model Pin_Headers.3dshapes/Pin_Header_Straight_2x04.wrl
(at (xyz 0.05 -0.15 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
)
)
(module Pin_Headers:Pin_Header_Straight_2x09 (layer F.Cu) (tedit 0) (tstamp 594B8C7A)
(at 145 117.7 90)
(descr "Through hole pin header")
(tags "pin header")
(path /5948FBD0)
(fp_text reference P4 (at 0 -5.1 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CONN_02X09 (at 0 -3.1 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.75 -1.75) (end -1.75 22.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.3 -1.75) (end 4.3 22.1) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 22.1) (end 4.3 22.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.81 21.59) (end 3.81 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 1.27) (end -1.27 21.59) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 21.59) (end -1.27 21.59) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 1 VCC))
(pad 2 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 8 PWM1))
(pad 3 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 2 GND))
(pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 9 PWM2))
(pad 5 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 10 SPI_CLK))
(pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 5 DAC1))
(pad 7 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 11 SPI_MISO))
(pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 7 DAC2))
(pad 9 thru_hole oval (at 0 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 12 SPI_MOSI))
(pad 10 thru_hole oval (at 2.54 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 13 GPIO1))
(pad 11 thru_hole oval (at 0 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 14 SPI_CS))
(pad 12 thru_hole oval (at 2.54 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 15 GPIO2))
(pad 13 thru_hole oval (at 0 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 16 I2C_SCL))
(pad 14 thru_hole oval (at 2.54 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 17 GPIO3))
(pad 15 thru_hole oval (at 0 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 18 I2C_SDA))
(pad 16 thru_hole oval (at 2.54 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 19 GPIO4))
(pad 17 thru_hole oval (at 0 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 20 UART_TX))
(pad 18 thru_hole oval (at 2.54 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 20 UART_TX))
(model Pin_Headers.3dshapes/Pin_Header_Straight_2x09.wrl
(at (xyz 0.05 -0.4 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
)
)
(module Pin_Headers:Pin_Header_Straight_2x04 (layer F.Cu) (tedit 0) (tstamp 594B9D1B)
(at 105 90 90)
(descr "Through hole pin header")
(tags "pin header")
(path /59490E80)
(fp_text reference P2 (at 0 -5.1 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CONN_02X04 (at 0 -3.1 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.75 -1.75) (end -1.75 9.4) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.3 -1.75) (end 4.3 9.4) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 9.4) (end 4.3 9.4) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.27 1.27) (end -1.27 8.89) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 8.89) (end 3.81 8.89) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 8.89) (end 3.81 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 1 VCC))
(pad 2 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 2 GND))
(pad 3 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 3 ADC1))
(pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 2 GND))
(pad 5 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 4 ADC2))
(pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 5 DAC1))
(pad 7 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 6 ADC3))
(pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 7 DAC2))
(model Pin_Headers.3dshapes/Pin_Header_Straight_2x04.wrl
(at (xyz 0.05 -0.15 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
)
)
(module Pin_Headers:Pin_Header_Straight_2x09 (layer F.Cu) (tedit 0) (tstamp 594B9D3D)
(at 145 97.7 90)
(descr "Through hole pin header")
(tags "pin header")
(path /59490EE5)
(fp_text reference P5 (at 0 -5.1 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CONN_02X09 (at 0 -3.1 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.75 -1.75) (end -1.75 22.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.3 -1.75) (end 4.3 22.1) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 22.1) (end 4.3 22.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.81 21.59) (end 3.81 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 1.27) (end -1.27 21.59) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 21.59) (end -1.27 21.59) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 1 VCC))
(pad 2 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 8 PWM1))
(pad 3 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 2 GND))
(pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 9 PWM2))
(pad 5 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 10 SPI_CLK))
(pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 5 DAC1))
(pad 7 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 11 SPI_MISO))
(pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 7 DAC2))
(pad 9 thru_hole oval (at 0 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 12 SPI_MOSI))
(pad 10 thru_hole oval (at 2.54 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 13 GPIO1))
(pad 11 thru_hole oval (at 0 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 14 SPI_CS))
(pad 12 thru_hole oval (at 2.54 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 15 GPIO2))
(pad 13 thru_hole oval (at 0 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 16 I2C_SCL))
(pad 14 thru_hole oval (at 2.54 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 17 GPIO3))
(pad 15 thru_hole oval (at 0 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 18 I2C_SDA))
(pad 16 thru_hole oval (at 2.54 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 19 GPIO4))
(pad 17 thru_hole oval (at 0 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 20 UART_TX))
(pad 18 thru_hole oval (at 2.54 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 20 UART_TX))
(model Pin_Headers.3dshapes/Pin_Header_Straight_2x09.wrl
(at (xyz 0.05 -0.4 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
)
)
(module Housings_SSOP:SSOP-28_5.3x10.2mm_Pitch0.65mm (layer F.Cu) (tedit 54130A77) (tstamp 594B9D6D)
(at 130 100)
(descr "28-Lead Plastic Shrink Small Outline (SS)-5.30 mm Body [SSOP] (see Microchip Packaging Specification 00000049BS.pdf)")
(tags "SSOP 0.65")
(path /59490896)
(attr smd)
(fp_text reference U1 (at 0 -6.25) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value FT232RL (at 0 6.25) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.65 -5.1) (end 2.65 -5.1) (layer F.Fab) (width 0.15))
(fp_line (start 2.65 -5.1) (end 2.65 5.1) (layer F.Fab) (width 0.15))
(fp_line (start 2.65 5.1) (end -2.65 5.1) (layer F.Fab) (width 0.15))
(fp_line (start -2.65 5.1) (end -2.65 -4.1) (layer F.Fab) (width 0.15))
(fp_line (start -2.65 -4.1) (end -1.65 -5.1) (layer F.Fab) (width 0.15))
(fp_line (start -4.75 -5.5) (end -4.75 5.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.75 -5.5) (end 4.75 5.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -4.75 -5.5) (end 4.75 -5.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -4.75 5.5) (end 4.75 5.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.875 -5.325) (end -2.875 -4.75) (layer F.SilkS) (width 0.15))
(fp_line (start 2.875 -5.325) (end 2.875 -4.675) (layer F.SilkS) (width 0.15))
(fp_line (start 2.875 5.325) (end 2.875 4.675) (layer F.SilkS) (width 0.15))
(fp_line (start -2.875 5.325) (end -2.875 4.675) (layer F.SilkS) (width 0.15))
(fp_line (start -2.875 -5.325) (end 2.875 -5.325) (layer F.SilkS) (width 0.15))
(fp_line (start -2.875 5.325) (end 2.875 5.325) (layer F.SilkS) (width 0.15))
(fp_line (start -2.875 -4.75) (end -4.475 -4.75) (layer F.SilkS) (width 0.15))
(pad 1 smd rect (at -3.6 -4.225) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -3.6 -3.575) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at -3.6 -2.925) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at -3.6 -2.275) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at -3.6 -1.625) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at -3.6 -0.975) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at -3.6 -0.325) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at -3.6 0.325) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 9 smd rect (at -3.6 0.975) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 10 smd rect (at -3.6 1.625) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 11 smd rect (at -3.6 2.275) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 12 smd rect (at -3.6 2.925) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 13 smd rect (at -3.6 3.575) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 14 smd rect (at -3.6 4.225) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 15 smd rect (at 3.6 4.225) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 16 smd rect (at 3.6 3.575) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 17 smd rect (at 3.6 2.925) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 18 smd rect (at 3.6 2.275) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 19 smd rect (at 3.6 1.625) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 20 smd rect (at 3.6 0.975) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 21 smd rect (at 3.6 0.325) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 22 smd rect (at 3.6 -0.325) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 23 smd rect (at 3.6 -0.975) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 24 smd rect (at 3.6 -1.625) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 25 smd rect (at 3.6 -2.275) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 26 smd rect (at 3.6 -2.925) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 27 smd rect (at 3.6 -3.575) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 28 smd rect (at 3.6 -4.225) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(model Housings_SSOP.3dshapes/SSOP-28_5.3x10.2mm_Pitch0.65mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Mounting_Holes:MountingHole_3.2mm_M3_DIN965_Pad (layer F.Cu) (tedit 56D1B4CB) (tstamp 594BA977)
(at 170 80)
(descr "Mounting Hole 3.2mm, M3, DIN965")
(tags "mounting hole 3.2mm m3 din965")
(fp_text reference REF** (at 0 -3.8) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value MountingHole_3.2mm_M3_DIN965_Pad (at 0 3.8) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2.8 0) (layer Cmts.User) (width 0.15))
(fp_circle (center 0 0) (end 3.05 0) (layer F.CrtYd) (width 0.05))
(pad 1 thru_hole circle (at 0 0) (size 5.6 5.6) (drill 3.2) (layers *.Cu *.Mask))
)
(module MyUSB:USB3145-30-1-A (layer F.Cu) (tedit 5948FD91) (tstamp 594BAB18)
(at 125 80)
(path /5948EBA5)
(fp_text reference P3 (at 1.905 3.175) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value USB_B (at 6.985 -3.175) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.762 -2.286) (end -0.762 2.286) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.762 2.286) (end 7.874 2.286) (layer F.CrtYd) (width 0.05))
(fp_line (start 7.874 2.286) (end 7.874 -2.286) (layer F.CrtYd) (width 0.05))
(fp_line (start 7.874 -2.286) (end -0.762 -2.286) (layer F.CrtYd) (width 0.05))
(fp_line (start 7.15 1.175) (end 7.15 1.975) (layer F.SilkS) (width 0.15))
(fp_line (start 7.15 -2) (end 7.15 -1.2) (layer F.SilkS) (width 0.15))
(fp_line (start 0 1.175) (end 0 1.975) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -2) (end 0 -1.2) (layer F.SilkS) (width 0.15))
(fp_line (start 0 2) (end 7.15 2) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -2) (end 7.15 -2) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole circle (at 2.275 0.11) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask))
(pad 4 thru_hole circle (at 4.225 1.11) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask))
(pad 5 thru_hole circle (at 4.875 0.11) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask))
(pad 2 thru_hole circle (at 2.925 1.11) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask))
(pad "" thru_hole oval (at 7.15 0) (size 0.75 1.55) (drill oval 0.35 1.15) (layers *.Cu *.Mask))
(pad "" thru_hole oval (at 0 0) (size 0.75 1.55) (drill oval 0.35 1.15) (layers *.Cu *.Mask))
(pad 3 thru_hole circle (at 3.575 0.11) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask))
)
(dimension 10 (width 0.3) (layer Dwgs.User)
(gr_text "10,000 mm" (at 100 134) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 95 110) (xy 95 132.7)))
(feature2 (pts (xy 105 110) (xy 105 132.7)))
(crossbar (pts (xy 105 130) (xy 95 130)))
(arrow1a (pts (xy 95 130) (xy 96.126504 129.413579)))
(arrow1b (pts (xy 95 130) (xy 96.126504 130.586421)))
(arrow2a (pts (xy 105 130) (xy 103.873496 129.413579)))
(arrow2b (pts (xy 105 130) (xy 103.873496 130.586421)))
)
(dimension 30 (width 0.3) (layer Dwgs.User)
(gr_text "30,000 mm" (at 160 110.65) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 175 119) (xy 175 109.3)))
(feature2 (pts (xy 145 119) (xy 145 109.3)))
(crossbar (pts (xy 145 112) (xy 175 112)))
(arrow1a (pts (xy 175 112) (xy 173.873496 112.586421)))
(arrow1b (pts (xy 175 112) (xy 173.873496 111.413579)))
(arrow2a (pts (xy 145 112) (xy 146.126504 112.586421)))
(arrow2b (pts (xy 145 112) (xy 146.126504 111.413579)))
)
(dimension 30 (width 0.3) (layer Dwgs.User)
(gr_text "30,000 mm" (at 160 102.35) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 175 97) (xy 175 103.7)))
(feature2 (pts (xy 145 97) (xy 145 103.7)))
(crossbar (pts (xy 145 101) (xy 175 101)))
(arrow1a (pts (xy 175 101) (xy 173.873496 101.586421)))
(arrow1b (pts (xy 175 101) (xy 173.873496 100.413579)))
(arrow2a (pts (xy 145 101) (xy 146.126504 101.586421)))
(arrow2b (pts (xy 145 101) (xy 146.126504 100.413579)))
)
(dimension 5 (width 0.3) (layer Dwgs.User)
(gr_text "5,000 mm" (at 189 123 270) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 170 125) (xy 186.7 125)))
(feature2 (pts (xy 170 120) (xy 186.7 120)))
(crossbar (pts (xy 184 120) (xy 184 125)))
(arrow1a (pts (xy 184 125) (xy 183.413579 123.873496)))
(arrow1b (pts (xy 184 125) (xy 184.586421 123.873496)))
(arrow2a (pts (xy 184 120) (xy 183.413579 121.126504)))
(arrow2b (pts (xy 184 120) (xy 184.586421 121.126504)))
)
(dimension 5 (width 0.3) (layer Dwgs.User)
(gr_text "5,000 mm" (at 174 135) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 175 120) (xy 175 133.7)))
(feature2 (pts (xy 170 120) (xy 170 133.7)))
(crossbar (pts (xy 170 131) (xy 175 131)))
(arrow1a (pts (xy 175 131) (xy 173.873496 131.586421)))
(arrow1b (pts (xy 175 131) (xy 173.873496 130.413579)))
(arrow2a (pts (xy 170 131) (xy 171.126504 131.586421)))
(arrow2b (pts (xy 170 131) (xy 171.126504 130.413579)))
)
(gr_text "Connectors are in an offset arrangement towards each other. This enables putting\none 90° angled connector above and one below the board -> more mechanical\nstability. Disadvantage: PCB thickness determines layout of backplane." (at 40 45) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)) (justify left))
)
(dimension 10 (width 0.3) (layer Dwgs.User)
(gr_text "10,000 mm" (at 102 95) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 95 90) (xy 95 95.7)))
(feature2 (pts (xy 105 90) (xy 105 95.7)))
(crossbar (pts (xy 105 93) (xy 95 93)))
(arrow1a (pts (xy 95 93) (xy 96.126504 92.413579)))
(arrow1b (pts (xy 95 93) (xy 96.126504 93.586421)))
(arrow2a (pts (xy 105 93) (xy 103.873496 92.413579)))
(arrow2b (pts (xy 105 93) (xy 103.873496 93.586421)))
)
(dimension 22.7 (width 0.3) (layer Dwgs.User)
(gr_text "22,700 mm" (at 191.35 86.35 90) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 145 75) (xy 192.7 75)))
(feature2 (pts (xy 145 97.7) (xy 192.7 97.7)))
(crossbar (pts (xy 190 97.7) (xy 190 75)))
(arrow1a (pts (xy 190 75) (xy 190.586421 76.126504)))
(arrow1b (pts (xy 190 75) (xy 189.413579 76.126504)))
(arrow2a (pts (xy 190 97.7) (xy 190.586421 96.573496)))
(arrow2b (pts (xy 190 97.7) (xy 189.413579 96.573496)))
)
(dimension 30 (width 0.3) (layer Dwgs.User)
(gr_text "30,000 mm" (at 107 80) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 95 80) (xy 95 84.7)))
(feature2 (pts (xy 125 80) (xy 125 84.7)))
(crossbar (pts (xy 125 82) (xy 95 82)))
(arrow1a (pts (xy 95 82) (xy 96.126504 81.413579)))
(arrow1b (pts (xy 95 82) (xy 96.126504 82.586421)))
(arrow2a (pts (xy 125 82) (xy 123.873496 81.413579)))
(arrow2b (pts (xy 125 82) (xy 123.873496 82.586421)))
)
(dimension 5 (width 0.3) (layer Dwgs.User)
(gr_text "5,000 mm" (at 116 75 90) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 125 75) (xy 118.3 75)))
(feature2 (pts (xy 125 80) (xy 118.3 80)))
(crossbar (pts (xy 121 80) (xy 121 75)))
(arrow1a (pts (xy 121 75) (xy 121.586421 76.126504)))
(arrow1b (pts (xy 121 75) (xy 120.413579 76.126504)))
(arrow2a (pts (xy 121 80) (xy 121.586421 78.873496)))
(arrow2b (pts (xy 121 80) (xy 120.413579 78.873496)))
)
(dimension 7.7 (width 0.3) (layer Dwgs.User)
(gr_text "7,700 mm" (at 87 114 90) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 145 110) (xy 90.9 110)))
(feature2 (pts (xy 145 117.7) (xy 90.9 117.7)))
(crossbar (pts (xy 93.6 117.7) (xy 93.6 110)))
(arrow1a (pts (xy 93.6 110) (xy 94.186421 111.126504)))
(arrow1b (pts (xy 93.6 110) (xy 93.013579 111.126504)))
(arrow2a (pts (xy 93.6 117.7) (xy 94.186421 116.573496)))
(arrow2b (pts (xy 93.6 117.7) (xy 93.013579 116.573496)))
)
(dimension 15 (width 0.3) (layer Dwgs.User)
(gr_text "15,000 mm" (at 78 82 90) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 105 75) (xy 77.3 75)))
(feature2 (pts (xy 105 90) (xy 77.3 90)))
(crossbar (pts (xy 80 90) (xy 80 75)))
(arrow1a (pts (xy 80 75) (xy 80.586421 76.126504)))
(arrow1b (pts (xy 80 75) (xy 79.413579 76.126504)))
(arrow2a (pts (xy 80 90) (xy 80.586421 88.873496)))
(arrow2b (pts (xy 80 90) (xy 79.413579 88.873496)))
)
(gr_text "+ 2 x Distance PCB-1stRow-TSW-109-XX-G-D-RA, 1.78 mm\n+ PCB Thickness, 1.6 mm \n+ Pitch, 2.54 mm\n-----------------------------------------\n7.7 mm\n " (at 40 61) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)) (justify left))
)
(dimension 7.7 (width 0.3) (layer Dwgs.User)
(gr_text "7,700 mm" (at 87 96 90) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 145 90) (xy 90.3 90)))
(feature2 (pts (xy 145 97.7) (xy 90.3 97.7)))
(crossbar (pts (xy 93 97.7) (xy 93 90)))
(arrow1a (pts (xy 93 90) (xy 93.586421 91.126504)))
(arrow1b (pts (xy 93 90) (xy 92.413579 91.126504)))
(arrow2a (pts (xy 93 97.7) (xy 93.586421 96.573496)))
(arrow2b (pts (xy 93 97.7) (xy 92.413579 96.573496)))
)
(dimension 80 (width 0.3) (layer Dwgs.User)
(gr_text "80,000 mm" (at 135 129.35) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 175 125) (xy 175 130.7)))
(feature2 (pts (xy 95 125) (xy 95 130.7)))
(crossbar (pts (xy 95 128) (xy 175 128)))
(arrow1a (pts (xy 175 128) (xy 173.873496 128.586421)))
(arrow1b (pts (xy 175 128) (xy 173.873496 127.413579)))
(arrow2a (pts (xy 95 128) (xy 96.126504 128.586421)))
(arrow2b (pts (xy 95 128) (xy 96.126504 127.413579)))
)
)

681
pcbs/backplane/backplane.kicad_pcb-bak
View File

@ -0,0 +1,681 @@
(kicad_pcb (version 4) (host pcbnew 4.0.5+dfsg1-4)
(general
(links 32)
(no_connects 32)
(area 40 41.25 197.85 136.350001)
(thickness 1.6)
(drawings 13)
(tracks 0)
(zones 0)
(modules 11)
(nets 21)
)
(page A4)
(title_block
(title "Backplane for UppSense")
(date 2017-06-20)
(rev 1.0)
(company "Uppsala University")
)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user)
(49 F.Fab user)
)
(setup
(last_trace_width 0.25)
(trace_clearance 0.2)
(zone_clearance 0.508)
(zone_45_only no)
(trace_min 0.2)
(segment_width 0.2)
(edge_width 0.15)
(via_size 0.6)
(via_drill 0.4)
(via_min_size 0.4)
(via_min_drill 0.3)
(uvia_size 0.3)
(uvia_drill 0.1)
(uvias_allowed no)
(uvia_min_size 0.2)
(uvia_min_drill 0.1)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.15)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 1.524 1.524)
(pad_drill 0.762)
(pad_to_mask_clearance 0.2)
(aux_axis_origin 0 0)
(visible_elements FFFFFF7F)
(pcbplotparams
(layerselection 0x00030_80000001)
(usegerberextensions false)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15)
(hpglpenoverlay 2)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 1)
(scaleselection 1)
(outputdirectory ""))
)
(net 0 "")
(net 1 VCC)
(net 2 GND)
(net 3 ADC1)
(net 4 ADC2)
(net 5 DAC1)
(net 6 ADC3)
(net 7 DAC2)
(net 8 PWM1)
(net 9 PWM2)
(net 10 SPI_CLK)
(net 11 SPI_MISO)
(net 12 SPI_MOSI)
(net 13 GPIO1)
(net 14 SPI_CS)
(net 15 GPIO2)
(net 16 I2C_SCL)
(net 17 GPIO3)
(net 18 I2C_SDA)
(net 19 GPIO4)
(net 20 UART_TX)
(net_class Default "This is the default net class."
(clearance 0.2)
(trace_width 0.25)
(via_dia 0.6)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net ADC1)
(add_net ADC2)
(add_net ADC3)
(add_net DAC1)
(add_net DAC2)
(add_net GND)
(add_net GPIO1)
(add_net GPIO2)
(add_net GPIO3)
(add_net GPIO4)
(add_net I2C_SCL)
(add_net I2C_SDA)
(add_net PWM1)
(add_net PWM2)
(add_net SPI_CLK)
(add_net SPI_CS)
(add_net SPI_MISO)
(add_net SPI_MOSI)
(add_net UART_TX)
(add_net VCC)
)
(module EuroBoard_Outline:EuroBoard_viertel_Type-I_80mmX50mm (layer F.Cu) (tedit 0) (tstamp 594B9E10)
(at 95 125)
(descr "Outline, Eurocard 1/4, Type I, 80x50mm,")
(tags "Outline, Eurocard 1/4, Type I, 80x50mm,")
(fp_text reference REF** (at 41.00068 -52.99964) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value EuroBoard_viertel_Type-I_80mmX50mm (at 41.9989 5.99948) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0 0) (end 0 -49.9999) (layer Edge.Cuts) (width 0.381))
(fp_line (start 0 -49.9999) (end 79.99984 -49.9999) (layer Edge.Cuts) (width 0.381))
(fp_line (start 79.99984 -49.9999) (end 79.99984 0) (layer Edge.Cuts) (width 0.381))
(fp_line (start 79.99984 0) (end 0 0) (layer Edge.Cuts) (width 0.381))
)
(module Mounting_Holes:MountingHole_3.2mm_M3_DIN965_Pad (layer F.Cu) (tedit 56D1B4CB) (tstamp 594BA990)
(at 100 80)
(descr "Mounting Hole 3.2mm, M3, DIN965")
(tags "mounting hole 3.2mm m3 din965")
(fp_text reference REF** (at 0 -3.8) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value MountingHole_3.2mm_M3_DIN965_Pad (at 0 3.8) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2.8 0) (layer Cmts.User) (width 0.15))
(fp_circle (center 0 0) (end 3.05 0) (layer F.CrtYd) (width 0.05))
(pad 1 thru_hole circle (at 0 0) (size 5.6 5.6) (drill 3.2) (layers *.Cu *.Mask))
)
(module Mounting_Holes:MountingHole_3.2mm_M3_DIN965_Pad (layer F.Cu) (tedit 56D1B4CB) (tstamp 594BA987)
(at 100 120)
(descr "Mounting Hole 3.2mm, M3, DIN965")
(tags "mounting hole 3.2mm m3 din965")
(fp_text reference REF** (at 0 -3.8) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value MountingHole_3.2mm_M3_DIN965_Pad (at 0 3.8) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2.8 0) (layer Cmts.User) (width 0.15))
(fp_circle (center 0 0) (end 3.05 0) (layer F.CrtYd) (width 0.05))
(pad 1 thru_hole circle (at 0 0) (size 5.6 5.6) (drill 3.2) (layers *.Cu *.Mask))
)
(module Mounting_Holes:MountingHole_3.2mm_M3_DIN965_Pad (layer F.Cu) (tedit 56D1B4CB) (tstamp 594BA980)
(at 170 120)
(descr "Mounting Hole 3.2mm, M3, DIN965")
(tags "mounting hole 3.2mm m3 din965")
(fp_text reference REF** (at 0 -3.8) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value MountingHole_3.2mm_M3_DIN965_Pad (at 0 3.8) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2.8 0) (layer Cmts.User) (width 0.15))
(fp_circle (center 0 0) (end 3.05 0) (layer F.CrtYd) (width 0.05))
(pad 1 thru_hole circle (at 0 0) (size 5.6 5.6) (drill 3.2) (layers *.Cu *.Mask))
)
(module Pin_Headers:Pin_Header_Straight_2x04 (layer F.Cu) (tedit 0) (tstamp 594B8A31)
(at 105 110 90)
(descr "Through hole pin header")
(tags "pin header")
(path /5948E65F)
(fp_text reference P1 (at 0 -5.1 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CONN_02X04 (at 0 -3.1 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.75 -1.75) (end -1.75 9.4) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.3 -1.75) (end 4.3 9.4) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 9.4) (end 4.3 9.4) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.27 1.27) (end -1.27 8.89) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 8.89) (end 3.81 8.89) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 8.89) (end 3.81 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 1 VCC))
(pad 2 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 2 GND))
(pad 3 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 3 ADC1))
(pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 2 GND))
(pad 5 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 4 ADC2))
(pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 5 DAC1))
(pad 7 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 6 ADC3))
(pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 7 DAC2))
(model Pin_Headers.3dshapes/Pin_Header_Straight_2x04.wrl
(at (xyz 0.05 -0.15 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
)
)
(module Pin_Headers:Pin_Header_Straight_2x09 (layer F.Cu) (tedit 0) (tstamp 594B8C7A)
(at 145 117.7 90)
(descr "Through hole pin header")
(tags "pin header")
(path /5948FBD0)
(fp_text reference P4 (at 0 -5.1 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CONN_02X09 (at 0 -3.1 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.75 -1.75) (end -1.75 22.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.3 -1.75) (end 4.3 22.1) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 22.1) (end 4.3 22.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.81 21.59) (end 3.81 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 1.27) (end -1.27 21.59) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 21.59) (end -1.27 21.59) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 1 VCC))
(pad 2 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 8 PWM1))
(pad 3 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 2 GND))
(pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 9 PWM2))
(pad 5 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 10 SPI_CLK))
(pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 5 DAC1))
(pad 7 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 11 SPI_MISO))
(pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 7 DAC2))
(pad 9 thru_hole oval (at 0 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 12 SPI_MOSI))
(pad 10 thru_hole oval (at 2.54 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 13 GPIO1))
(pad 11 thru_hole oval (at 0 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 14 SPI_CS))
(pad 12 thru_hole oval (at 2.54 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 15 GPIO2))
(pad 13 thru_hole oval (at 0 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 16 I2C_SCL))
(pad 14 thru_hole oval (at 2.54 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 17 GPIO3))
(pad 15 thru_hole oval (at 0 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 18 I2C_SDA))
(pad 16 thru_hole oval (at 2.54 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 19 GPIO4))
(pad 17 thru_hole oval (at 0 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 20 UART_TX))
(pad 18 thru_hole oval (at 2.54 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 20 UART_TX))
(model Pin_Headers.3dshapes/Pin_Header_Straight_2x09.wrl
(at (xyz 0.05 -0.4 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
)
)
(module Pin_Headers:Pin_Header_Straight_2x04 (layer F.Cu) (tedit 0) (tstamp 594B9D1B)
(at 105 90 90)
(descr "Through hole pin header")
(tags "pin header")
(path /59490E80)
(fp_text reference P2 (at 0 -5.1 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CONN_02X04 (at 0 -3.1 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.75 -1.75) (end -1.75 9.4) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.3 -1.75) (end 4.3 9.4) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 9.4) (end 4.3 9.4) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.27 1.27) (end -1.27 8.89) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 8.89) (end 3.81 8.89) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 8.89) (end 3.81 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 1 VCC))
(pad 2 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 2 GND))
(pad 3 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 3 ADC1))
(pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 2 GND))
(pad 5 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 4 ADC2))
(pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 5 DAC1))
(pad 7 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 6 ADC3))
(pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 7 DAC2))
(model Pin_Headers.3dshapes/Pin_Header_Straight_2x04.wrl
(at (xyz 0.05 -0.15 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
)
)
(module Pin_Headers:Pin_Header_Straight_2x09 (layer F.Cu) (tedit 0) (tstamp 594B9D3D)
(at 145 97.7 90)
(descr "Through hole pin header")
(tags "pin header")
(path /59490EE5)
(fp_text reference P5 (at 0 -5.1 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CONN_02X09 (at 0 -3.1 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.75 -1.75) (end -1.75 22.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.3 -1.75) (end 4.3 22.1) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 22.1) (end 4.3 22.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.81 21.59) (end 3.81 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 1.27) (end -1.27 21.59) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 21.59) (end -1.27 21.59) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 1 VCC))
(pad 2 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 8 PWM1))
(pad 3 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 2 GND))
(pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 9 PWM2))
(pad 5 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 10 SPI_CLK))
(pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 5 DAC1))
(pad 7 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 11 SPI_MISO))
(pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 7 DAC2))
(pad 9 thru_hole oval (at 0 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 12 SPI_MOSI))
(pad 10 thru_hole oval (at 2.54 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 13 GPIO1))
(pad 11 thru_hole oval (at 0 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 14 SPI_CS))
(pad 12 thru_hole oval (at 2.54 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 15 GPIO2))
(pad 13 thru_hole oval (at 0 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 16 I2C_SCL))
(pad 14 thru_hole oval (at 2.54 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 17 GPIO3))
(pad 15 thru_hole oval (at 0 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 18 I2C_SDA))
(pad 16 thru_hole oval (at 2.54 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 19 GPIO4))
(pad 17 thru_hole oval (at 0 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 20 UART_TX))
(pad 18 thru_hole oval (at 2.54 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 20 UART_TX))
(model Pin_Headers.3dshapes/Pin_Header_Straight_2x09.wrl
(at (xyz 0.05 -0.4 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
)
)
(module Housings_SSOP:SSOP-28_5.3x10.2mm_Pitch0.65mm (layer F.Cu) (tedit 54130A77) (tstamp 594B9D6D)
(at 130 100)
(descr "28-Lead Plastic Shrink Small Outline (SS)-5.30 mm Body [SSOP] (see Microchip Packaging Specification 00000049BS.pdf)")
(tags "SSOP 0.65")
(path /59490896)
(attr smd)
(fp_text reference U1 (at 0 -6.25) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value FT232RL (at 0 6.25) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.65 -5.1) (end 2.65 -5.1) (layer F.Fab) (width 0.15))
(fp_line (start 2.65 -5.1) (end 2.65 5.1) (layer F.Fab) (width 0.15))
(fp_line (start 2.65 5.1) (end -2.65 5.1) (layer F.Fab) (width 0.15))
(fp_line (start -2.65 5.1) (end -2.65 -4.1) (layer F.Fab) (width 0.15))
(fp_line (start -2.65 -4.1) (end -1.65 -5.1) (layer F.Fab) (width 0.15))
(fp_line (start -4.75 -5.5) (end -4.75 5.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.75 -5.5) (end 4.75 5.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -4.75 -5.5) (end 4.75 -5.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -4.75 5.5) (end 4.75 5.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.875 -5.325) (end -2.875 -4.75) (layer F.SilkS) (width 0.15))
(fp_line (start 2.875 -5.325) (end 2.875 -4.675) (layer F.SilkS) (width 0.15))
(fp_line (start 2.875 5.325) (end 2.875 4.675) (layer F.SilkS) (width 0.15))
(fp_line (start -2.875 5.325) (end -2.875 4.675) (layer F.SilkS) (width 0.15))
(fp_line (start -2.875 -5.325) (end 2.875 -5.325) (layer F.SilkS) (width 0.15))
(fp_line (start -2.875 5.325) (end 2.875 5.325) (layer F.SilkS) (width 0.15))
(fp_line (start -2.875 -4.75) (end -4.475 -4.75) (layer F.SilkS) (width 0.15))
(pad 1 smd rect (at -3.6 -4.225) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -3.6 -3.575) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at -3.6 -2.925) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at -3.6 -2.275) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at -3.6 -1.625) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at -3.6 -0.975) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at -3.6 -0.325) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at -3.6 0.325) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 9 smd rect (at -3.6 0.975) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 10 smd rect (at -3.6 1.625) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 11 smd rect (at -3.6 2.275) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 12 smd rect (at -3.6 2.925) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 13 smd rect (at -3.6 3.575) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 14 smd rect (at -3.6 4.225) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 15 smd rect (at 3.6 4.225) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 16 smd rect (at 3.6 3.575) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 17 smd rect (at 3.6 2.925) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 18 smd rect (at 3.6 2.275) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 19 smd rect (at 3.6 1.625) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 20 smd rect (at 3.6 0.975) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 21 smd rect (at 3.6 0.325) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 22 smd rect (at 3.6 -0.325) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 23 smd rect (at 3.6 -0.975) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 24 smd rect (at 3.6 -1.625) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 25 smd rect (at 3.6 -2.275) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 26 smd rect (at 3.6 -2.925) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 27 smd rect (at 3.6 -3.575) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 28 smd rect (at 3.6 -4.225) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(model Housings_SSOP.3dshapes/SSOP-28_5.3x10.2mm_Pitch0.65mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Mounting_Holes:MountingHole_3.2mm_M3_DIN965_Pad (layer F.Cu) (tedit 56D1B4CB) (tstamp 594BA977)
(at 170 80)
(descr "Mounting Hole 3.2mm, M3, DIN965")
(tags "mounting hole 3.2mm m3 din965")
(fp_text reference REF** (at 0 -3.8) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value MountingHole_3.2mm_M3_DIN965_Pad (at 0 3.8) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2.8 0) (layer Cmts.User) (width 0.15))
(fp_circle (center 0 0) (end 3.05 0) (layer F.CrtYd) (width 0.05))
(pad 1 thru_hole circle (at 0 0) (size 5.6 5.6) (drill 3.2) (layers *.Cu *.Mask))
)
(module MyUSB:USB3145-30-1-A (layer F.Cu) (tedit 5948FD91) (tstamp 594BAB18)
(at 125 80)
(path /5948EBA5)
(fp_text reference P3 (at 1.905 3.175) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value USB_B (at 6.985 -3.175) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.762 -2.286) (end -0.762 2.286) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.762 2.286) (end 7.874 2.286) (layer F.CrtYd) (width 0.05))
(fp_line (start 7.874 2.286) (end 7.874 -2.286) (layer F.CrtYd) (width 0.05))
(fp_line (start 7.874 -2.286) (end -0.762 -2.286) (layer F.CrtYd) (width 0.05))
(fp_line (start 7.15 1.175) (end 7.15 1.975) (layer F.SilkS) (width 0.15))
(fp_line (start 7.15 -2) (end 7.15 -1.2) (layer F.SilkS) (width 0.15))
(fp_line (start 0 1.175) (end 0 1.975) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -2) (end 0 -1.2) (layer F.SilkS) (width 0.15))
(fp_line (start 0 2) (end 7.15 2) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -2) (end 7.15 -2) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole circle (at 2.275 0.11) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask))
(pad 4 thru_hole circle (at 4.225 1.11) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask))
(pad 5 thru_hole circle (at 4.875 0.11) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask))
(pad 2 thru_hole circle (at 2.925 1.11) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask))
(pad "" thru_hole oval (at 7.15 0) (size 0.75 1.55) (drill oval 0.35 1.15) (layers *.Cu *.Mask))
(pad "" thru_hole oval (at 0 0) (size 0.75 1.55) (drill oval 0.35 1.15) (layers *.Cu *.Mask))
(pad 3 thru_hole circle (at 3.575 0.11) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask))
)
(dimension 5 (width 0.3) (layer Dwgs.User)
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(effects (font (size 1.5 1.5) (thickness 0.3)))
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(effects (font (size 1.5 1.5) (thickness 0.3)) (justify left))
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289
pcbs/backplane/backplane.net
View File

@ -0,0 +1,289 @@
(export (version D)
(design
(source /home/maximilian/UppSense/pcbs/backplane/backplane.sch)
(date "tis 20 jun 2017 12:32:15")
(tool "Eeschema 4.0.5+dfsg1-4")
(sheet (number 1) (name /) (tstamps /)
(title_block
(title)
(company)
(rev)
(date)
(source backplane.sch)
(comment (number 1) (value ""))
(comment (number 2) (value ""))
(comment (number 3) (value ""))
(comment (number 4) (value "")))))
(components
(comp (ref P1)
(value CONN_02X04)
(footprint Pin_Headers:Pin_Header_Straight_2x04)
(libsource (lib conn) (part CONN_02X04))
(sheetpath (names /) (tstamps /))
(tstamp 5948E65F))
(comp (ref P3)
(value USB_B)
(footprint MyUSB:USB3145-30-1-A)
(datasheet http://www.farnell.com/datasheets/1841848.pdf)
(fields
(field (name Farnell) 2443141))
(libsource (lib conn) (part USB_B))
(sheetpath (names /) (tstamps /))
(tstamp 5948EBA5))
(comp (ref P4)
(value CONN_02X09)
(footprint Pin_Headers:Pin_Header_Straight_2x09)
(libsource (lib conn) (part CONN_02X09))
(sheetpath (names /) (tstamps /))
(tstamp 5948FBD0))
(comp (ref U1)
(value FT232RL)
(footprint Housings_SSOP:SSOP-28_5.3x10.2mm_Pitch0.65mm)
(libsource (lib ft232rl) (part FT232RL))
(sheetpath (names /) (tstamps /))
(tstamp 59490896))
(comp (ref P2)
(value CONN_02X04)
(footprint Pin_Headers:Pin_Header_Straight_2x04)
(libsource (lib conn) (part CONN_02X04))
(sheetpath (names /) (tstamps /))
(tstamp 59490E80))
(comp (ref P5)
(value CONN_02X09)
(footprint Pin_Headers:Pin_Header_Straight_2x09)
(libsource (lib conn) (part CONN_02X09))
(sheetpath (names /) (tstamps /))
(tstamp 59490EE5)))
(libparts
(libpart (lib conn) (part CONN_02X04)
(description "Connector, double row, 02x04")
(footprints
(fp Pin_Header_Straight_2X04)
(fp Pin_Header_Angled_2X04)
(fp Socket_Strip_Straight_2X04)
(fp Socket_Strip_Angled_2X04))
(fields
(field (name Reference) P)
(field (name Value) CONN_02X04))
(pins
(pin (num 1) (name P1) (type passive))
(pin (num 2) (name P2) (type passive))
(pin (num 3) (name P3) (type passive))
(pin (num 4) (name P4) (type passive))
(pin (num 5) (name P5) (type passive))
(pin (num 6) (name P6) (type passive))
(pin (num 7) (name P7) (type passive))
(pin (num 8) (name P8) (type passive))))
(libpart (lib conn) (part CONN_02X09)
(description "Connector, double row, 02x09")
(footprints
(fp Pin_Header_Straight_2X09)
(fp Pin_Header_Angled_2X09)
(fp Socket_Strip_Straight_2X09)
(fp Socket_Strip_Angled_2X09))
(fields
(field (name Reference) P)
(field (name Value) CONN_02X09))
(pins
(pin (num 1) (name P1) (type passive))
(pin (num 2) (name P2) (type passive))
(pin (num 3) (name P3) (type passive))
(pin (num 4) (name P4) (type passive))
(pin (num 5) (name P5) (type passive))
(pin (num 6) (name P6) (type passive))
(pin (num 7) (name P7) (type passive))
(pin (num 8) (name P8) (type passive))
(pin (num 9) (name P9) (type passive))
(pin (num 10) (name P10) (type passive))
(pin (num 11) (name P11) (type passive))
(pin (num 12) (name P12) (type passive))
(pin (num 13) (name P13) (type passive))
(pin (num 14) (name P14) (type passive))
(pin (num 15) (name P15) (type passive))
(pin (num 16) (name P16) (type passive))
(pin (num 17) (name P17) (type passive))
(pin (num 18) (name P18) (type passive))))
(libpart (lib ft232rl) (part FT232RL)
(fields
(field (name Reference) U)
(field (name Value) FT232RL))
(pins
(pin (num 1) (name TXD) (type output))
(pin (num 2) (name nDTR) (type output))
(pin (num 3) (name nRTS) (type output))
(pin (num 4) (name VCCIO) (type power_in))
(pin (num 5) (name RXD) (type input))
(pin (num 6) (name nRI) (type input))
(pin (num 7) (name GND) (type power_in))
(pin (num 9) (name nDRS) (type input))
(pin (num 10) (name nDCD) (type input))
(pin (num 11) (name nCTS) (type input))
(pin (num 12) (name CBUS4) (type BiDi))
(pin (num 13) (name CBUS2) (type BiDi))
(pin (num 14) (name CBUS3) (type BiDi))
(pin (num 15) (name USBDP) (type BiDi))
(pin (num 16) (name USBDM) (type BiDi))
(pin (num 17) (name 3V3OUT) (type power_out))
(pin (num 18) (name GND) (type power_in))
(pin (num 19) (name nRESET) (type input))
(pin (num 20) (name VCC) (type power_in))
(pin (num 21) (name GND) (type power_in))
(pin (num 22) (name CBUS1) (type BiDi))
(pin (num 23) (name CBUS0) (type BiDi))
(pin (num 25) (name AGND) (type power_in))
(pin (num 26) (name TEST) (type input))
(pin (num 27) (name OSCI) (type input))
(pin (num 28) (name OSCO) (type output))))
(libpart (lib conn) (part USB_B)
(description "USB Type B connector")
(footprints
(fp USB*))
(fields
(field (name Reference) P)
(field (name Value) USB_B))
(pins
(pin (num 1) (name VBUS) (type power_out))
(pin (num 2) (name D-) (type passive))
(pin (num 3) (name D+) (type passive))
(pin (num 4) (name GND) (type power_in))
(pin (num 5) (name shield) (type passive)))))
(libraries
(library (logical conn)
(uri /usr/share/kicad/library/conn.lib))
(library (logical ft232rl)
(uri /home/maximilian/UppSense/pcbs/backplane/myLibs/ft232rl.lib)))
(nets
(net (code 1) (name ADC1)
(node (ref P2) (pin 3))
(node (ref P1) (pin 3)))
(net (code 2) (name ADC2)
(node (ref P2) (pin 5))
(node (ref P1) (pin 5)))
(net (code 3) (name DAC1)
(node (ref P5) (pin 6))
(node (ref P4) (pin 6))
(node (ref P1) (pin 6))
(node (ref P2) (pin 6)))
(net (code 4) (name ADC3)
(node (ref P1) (pin 7))
(node (ref P2) (pin 7)))
(net (code 5) (name DAC2)
(node (ref P1) (pin 8))
(node (ref P5) (pin 8))
(node (ref P2) (pin 8))
(node (ref P4) (pin 8)))
(net (code 6) (name GND)
(node (ref P1) (pin 2))
(node (ref P1) (pin 4))
(node (ref P4) (pin 3))
(node (ref P2) (pin 4))
(node (ref P2) (pin 2))
(node (ref P5) (pin 3)))
(net (code 7) (name "Net-(U1-Pad26)")
(node (ref U1) (pin 26)))
(net (code 8) (name "Net-(U1-Pad17)")
(node (ref U1) (pin 17)))
(net (code 9) (name "Net-(U1-Pad27)")
(node (ref U1) (pin 27)))
(net (code 10) (name "Net-(U1-Pad18)")
(node (ref U1) (pin 18)))
(net (code 11) (name "Net-(U1-Pad28)")
(node (ref U1) (pin 28)))
(net (code 12) (name "Net-(U1-Pad19)")
(node (ref U1) (pin 19)))
(net (code 13) (name VCC)
(node (ref P4) (pin 1))
(node (ref P5) (pin 1))
(node (ref P1) (pin 1))
(node (ref P2) (pin 1)))
(net (code 14) (name SPI_CLK)
(node (ref P5) (pin 5))
(node (ref P4) (pin 5)))
(net (code 15) (name SPI_MISO)
(node (ref P4) (pin 7))
(node (ref P5) (pin 7)))
(net (code 16) (name SPI_MOSI)
(node (ref P5) (pin 9))
(node (ref P4) (pin 9)))
(net (code 17) (name SPI_CS)
(node (ref P5) (pin 11))
(node (ref P4) (pin 11)))
(net (code 18) (name "Net-(U1-Pad16)")
(node (ref U1) (pin 16)))
(net (code 19) (name I2C_SCL)
(node (ref P5) (pin 13))
(node (ref P4) (pin 13)))
(net (code 20) (name I2C_SDA)
(node (ref P5) (pin 15))
(node (ref P4) (pin 15)))
(net (code 21) (name GPIO3)
(node (ref P5) (pin 14))
(node (ref P4) (pin 14)))
(net (code 22) (name GPIO1)
(node (ref P4) (pin 10))
(node (ref P5) (pin 10)))
(net (code 23) (name GPIO2)
(node (ref P4) (pin 12))
(node (ref P5) (pin 12)))
(net (code 24) (name GPIO4)
(node (ref P5) (pin 16))
(node (ref P4) (pin 16)))
(net (code 25) (name UART_TX)
(node (ref P5) (pin 18))
(node (ref P5) (pin 17))
(node (ref P4) (pin 17))
(node (ref P4) (pin 18)))
(net (code 26) (name "Net-(P3-Pad2)")
(node (ref P3) (pin 2)))
(net (code 27) (name "Net-(P3-Pad1)")
(node (ref P3) (pin 1)))
(net (code 28) (name "Net-(P3-Pad3)")
(node (ref P3) (pin 3)))
(net (code 29) (name "Net-(P3-Pad4)")
(node (ref P3) (pin 4)))
(net (code 30) (name "Net-(P3-Pad5)")
(node (ref P3) (pin 5)))
(net (code 31) (name PWM1)
(node (ref P5) (pin 2))
(node (ref P4) (pin 2)))
(net (code 32) (name PWM2)
(node (ref P4) (pin 4))
(node (ref P5) (pin 4)))
(net (code 33) (name "Net-(U1-Pad21)")
(node (ref U1) (pin 21)))
(net (code 34) (name "Net-(U1-Pad4)")
(node (ref U1) (pin 4)))
(net (code 35) (name "Net-(U1-Pad5)")
(node (ref U1) (pin 5)))
(net (code 36) (name "Net-(U1-Pad6)")
(node (ref U1) (pin 6)))
(net (code 37) (name "Net-(U1-Pad7)")
(node (ref U1) (pin 7)))
(net (code 38) (name "Net-(U1-Pad9)")
(node (ref U1) (pin 9)))
(net (code 39) (name "Net-(U1-Pad10)")
(node (ref U1) (pin 10)))
(net (code 40) (name "Net-(U1-Pad20)")
(node (ref U1) (pin 20)))
(net (code 41) (name "Net-(U1-Pad11)")
(node (ref U1) (pin 11)))
(net (code 42) (name "Net-(U1-Pad3)")
(node (ref U1) (pin 3)))
(net (code 43) (name "Net-(U1-Pad12)")
(node (ref U1) (pin 12)))
(net (code 44) (name "Net-(U1-Pad22)")
(node (ref U1) (pin 22)))
(net (code 45) (name "Net-(U1-Pad13)")
(node (ref U1) (pin 13)))
(net (code 46) (name "Net-(U1-Pad23)")
(node (ref U1) (pin 23)))
(net (code 47) (name "Net-(U1-Pad14)")
(node (ref U1) (pin 14)))
(net (code 48) (name "Net-(U1-Pad15)")
(node (ref U1) (pin 15)))
(net (code 49) (name "Net-(U1-Pad25)")
(node (ref U1) (pin 25)))
(net (code 50) (name "Net-(U1-Pad2)")
(node (ref U1) (pin 2)))
(net (code 51) (name "Net-(U1-Pad1)")
(node (ref U1) (pin 1)))))

72
pcbs/backplane/backplane.pro
View File

@ -0,0 +1,72 @@
update=tis 20 jun 2017 12:51:57
version=1
last_client=kicad
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
[general]
version=1
[eeschema]
version=1
LibDir=
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=transistors
LibName4=conn
LibName5=linear
LibName6=regul
LibName7=74xx
LibName8=cmos4000
LibName9=adc-dac
LibName10=memory
LibName11=xilinx
LibName12=microcontrollers
LibName13=dsp
LibName14=microchip
LibName15=analog_switches
LibName16=motorola
LibName17=texas
LibName18=intel
LibName19=audio
LibName20=interface
LibName21=digital-audio
LibName22=philips
LibName23=display
LibName24=cypress
LibName25=siliconi
LibName26=opto
LibName27=atmel
LibName28=contrib
LibName29=valves
LibName30=myLibs/silabs
LibName31=myLibs/ft232rl
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=Pcbnew
SpiceForceRefPrefix=0
SpiceUseNetNumbers=0
LabSize=60

219
pcbs/backplane/backplane.sch
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EESchema Schematic File Version 2
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:silabs
LIBS:ft232rl
LIBS:backplane-cache
EELAYER 25 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L CONN_02X04 P1
U 1 1 5948E65F
P 2100 2400
F 0 "P1" H 2100 2650 50 0000 C CNN
F 1 "CONN_02X04" H 2100 2150 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x04" H 2100 1200 50 0001 C CNN
F 3 "" H 2100 1200 50 0000 C CNN
1 2100 2400
1 0 0 -1
$EndComp
$Comp
L USB_B P3
U 1 1 5948EBA5
P 7200 4300
F 0 "P3" H 7400 4100 50 0000 C CNN
F 1 "USB_B" H 7150 4500 50 0000 C CNN
F 2 "MyUSB:USB3145-30-1-A" V 7150 4200 50 0001 C CNN
F 3 "http://www.farnell.com/datasheets/1841848.pdf" V 7150 4200 50 0001 C CNN
F 4 "2443141" H 7200 4300 60 0001 C CNN "Farnell"
1 7200 4300
-1 0 0 1
$EndComp
$Comp
L CONN_02X09 P4
U 1 1 5948FBD0
P 7500 2500
F 0 "P4" H 7500 3000 50 0000 C CNN
F 1 "CONN_02X09" V 7500 2500 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x09" H 7500 1300 50 0001 C CNN
F 3 "" H 7500 1300 50 0000 C CNN
1 7500 2500
1 0 0 -1
$EndComp
Text GLabel 1850 2250 0 60 UnSpc ~ 0
Vcc
Text GLabel 1850 2350 0 60 UnSpc ~ 0
ADC1
Text GLabel 1850 2450 0 60 UnSpc ~ 0
ADC2
Text GLabel 1850 2550 0 60 UnSpc ~ 0
ADC3
Text GLabel 2350 2250 2 60 UnSpc ~ 0
GND
Text GLabel 2350 2350 2 60 UnSpc ~ 0
GND
Text GLabel 2350 2450 2 60 UnSpc ~ 0
DAC1
Text GLabel 2350 2550 2 60 UnSpc ~ 0
DAC2
Text GLabel 7250 2100 0 60 UnSpc ~ 0
VCC
Text GLabel 7250 2200 0 60 UnSpc ~ 0
GND
Text GLabel 7250 2300 0 60 UnSpc ~ 0
SPI_CLK
Text GLabel 7250 2400 0 60 UnSpc ~ 0
SPI_MISO
Text GLabel 7250 2500 0 60 UnSpc ~ 0
SPI_MOSI
Text GLabel 7250 2600 0 60 UnSpc ~ 0
SPI_CS
Text GLabel 7250 2700 0 60 UnSpc ~ 0
I2C_SCL
Text GLabel 7250 2800 0 60 UnSpc ~ 0
I2C_SDA
Text GLabel 7250 2900 0 60 UnSpc ~ 0
UART_TX
$Comp
L FT232RL U1
U 1 1 59490896
P 5150 4050
F 0 "U1" H 4400 5250 60 0000 C CNN
F 1 "FT232RL" H 5150 4050 60 0000 C CNN
F 2 "Housings_SSOP:SSOP-28_5.3x10.2mm_Pitch0.65mm" H 5150 4050 60 0001 C CNN
F 3 "" H 5150 4050 60 0001 C CNN
1 5150 4050
1 0 0 -1
$EndComp
Text GLabel 7750 2100 2 60 UnSpc ~ 0
PWM1
Text GLabel 7750 2200 2 60 UnSpc ~ 0
PWM2
Text GLabel 7750 2300 2 60 UnSpc ~ 0
DAC1
Text GLabel 7750 2400 2 60 UnSpc ~ 0
DAC2
Text GLabel 7750 2500 2 60 UnSpc ~ 0
GPIO1
Text GLabel 7750 2600 2 60 UnSpc ~ 0
GPIO2
Text GLabel 7750 2700 2 60 UnSpc ~ 0
GPIO3
Text GLabel 7750 2800 2 60 UnSpc ~ 0
GPIO4
Text GLabel 7750 2900 2 60 UnSpc ~ 0
UART_TX
$Comp
L CONN_02X04 P2
U 1 1 59490E80
P 2100 3250
F 0 "P2" H 2100 3500 50 0000 C CNN
F 1 "CONN_02X04" H 2100 3000 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x04" H 2100 2050 50 0001 C CNN
F 3 "" H 2100 2050 50 0000 C CNN
1 2100 3250
1 0 0 -1
$EndComp
Text GLabel 1850 3100 0 60 UnSpc ~ 0
Vcc
Text GLabel 1850 3200 0 60 UnSpc ~ 0
ADC1
Text GLabel 1850 3300 0 60 UnSpc ~ 0
ADC2
Text GLabel 1850 3400 0 60 UnSpc ~ 0
ADC3
Text GLabel 2350 3100 2 60 UnSpc ~ 0
GND
Text GLabel 2350 3200 2 60 UnSpc ~ 0
GND
Text GLabel 2350 3300 2 60 UnSpc ~ 0
DAC1
Text GLabel 2350 3400 2 60 UnSpc ~ 0
DAC2
$Comp
L CONN_02X09 P5
U 1 1 59490EE5
P 9650 2500
F 0 "P5" H 9650 3000 50 0000 C CNN
F 1 "CONN_02X09" V 9650 2500 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x09" H 9650 1300 50 0001 C CNN
F 3 "" H 9650 1300 50 0000 C CNN
1 9650 2500
1 0 0 -1
$EndComp
Text GLabel 9400 2100 0 60 UnSpc ~ 0
VCC
Text GLabel 9400 2200 0 60 UnSpc ~ 0
GND
Text GLabel 9400 2300 0 60 UnSpc ~ 0
SPI_CLK
Text GLabel 9400 2400 0 60 UnSpc ~ 0
SPI_MISO
Text GLabel 9400 2500 0 60 UnSpc ~ 0
SPI_MOSI
Text GLabel 9400 2600 0 60 UnSpc ~ 0
SPI_CS
Text GLabel 9400 2700 0 60 UnSpc ~ 0
I2C_SCL
Text GLabel 9400 2800 0 60 UnSpc ~ 0
I2C_SDA
Text GLabel 9400 2900 0 60 UnSpc ~ 0
UART_TX
Text GLabel 9900 2100 2 60 UnSpc ~ 0
PWM1
Text GLabel 9900 2200 2 60 UnSpc ~ 0
PWM2
Text GLabel 9900 2300 2 60 UnSpc ~ 0
DAC1
Text GLabel 9900 2400 2 60 UnSpc ~ 0
DAC2
Text GLabel 9900 2500 2 60 UnSpc ~ 0
GPIO1
Text GLabel 9900 2600 2 60 UnSpc ~ 0
GPIO2
Text GLabel 9900 2700 2 60 UnSpc ~ 0
GPIO3
Text GLabel 9900 2800 2 60 UnSpc ~ 0
GPIO4
Text GLabel 9900 2900 2 60 UnSpc ~ 0
UART_TX
$EndSCHEMATC

11
pcbs/backplane/mates_to_fit_backplane
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Mates for the Connectors Mounted on the Backplane
--------------------------------------------------
First conenctor BCS-104-F-D-TE
-------------------------------
TSW-104-08-G-D-RA
Second Connector BCS-109-F-D-TE
-------------------------------
TSW-109-08-G-D-RA

39
pcbs/backplane/myLibs/ft232rl.lib
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EESchema-LIBRARY Version 2.3 Date: Sun Oct 3 00:35:58 2010
#
# FT232RL
#
DEF FT232RL U 0 40 Y Y 1 F N
F0 "U" -750 1200 60 H V C CNN
F1 "FT232RL" 0 0 60 H V C CNN
DRAW
S -800 1100 800 -1100 0 1 0 N
X TXD 1 1100 900 300 L 50 50 1 1 O
X nDTR 2 1100 300 300 L 50 50 1 1 O
X nRTS 3 1100 600 300 L 50 50 1 1 O
X VCCIO 4 -1100 900 300 R 50 50 1 1 W
X RXD 5 1100 750 300 L 50 50 1 1 I
X nRI 6 1100 -150 300 L 50 50 1 1 I
X GND 7 -150 -1400 300 U 50 50 1 1 W
X nDRS 9 1100 150 300 L 50 50 1 1 I
X nDCD 10 1100 0 300 L 50 50 1 1 I
X VCC 20 -1100 750 300 R 50 50 1 1 W
X nCTS 11 1100 450 300 L 50 50 1 1 I
X GND 21 150 -1400 300 U 50 50 1 1 W
X CBUS4 12 1100 -900 300 L 50 50 1 1 B
X CBUS1 22 1100 -450 300 L 50 50 1 1 B
X CBUS2 13 1100 -600 300 L 50 50 1 1 B
X CBUS0 23 1100 -300 300 L 50 50 1 1 B
X CBUS3 14 1100 -750 300 L 50 50 1 1 B
X USBDP 15 -1100 300 300 R 50 50 1 1 B
X AGND 25 -300 -1400 300 U 50 50 1 1 W
X USBDM 16 -1100 450 300 R 50 50 1 1 B
X TEST 26 300 -1400 300 U 50 50 1 1 I
X 3V3OUT 17 -1100 -900 300 R 50 50 1 1 w
X OSCI 27 -1100 -300 300 R 50 50 1 1 I
X GND 18 0 -1400 300 U 50 50 1 1 W
X OSCO 28 -1100 -450 300 R 50 50 1 1 O
X nRESET 19 -1100 0 300 R 50 50 1 1 I
ENDDRAW
ENDDEF
#
#End Library

57
pcbs/backplane/myLibs/silabs.dcm
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EESchema-DOCLIB Version 2.0
#
$CMP CP2102N-A01-GQFN24
D USB to UART master bridge
K USB UART bridge
F http://www.silabs.com/support%20documents/technicaldocs/cp2102n-datasheet.pdf
$ENDCMP
#
$CMP CP2104
D Single-Chip USB-to-UART Bridge, USB 2.0 Full-Speed, 2Mbps UART, QFN package
K uart usb bridge interface transceiver
F https://www.silabs.com/Support%20Documents/TechnicalDocs/cp2104.pdf
$ENDCMP
#
$CMP CP2112
D HID USB to SMBUS master bridge
K USB SMBUS bridge
F http://www.silabs.com/Support%20Documents/TechnicalDocs/CP2112.pdf
$ENDCMP
#
$CMP Si3210
D ProSLIC Programmable cmos slic/codec with ringing/battery voltage generation
K ProSLIC slic
F http://www.mouser.com/ds/2/368/si3210-38974.pdf
$ENDCMP
#
$CMP Si4362
D EZRadioPRO Low Current Receiver
K radio receiver
F http://www.silabs.com/Support%20Documents/TechnicalDocs/Si4362.pdf
$ENDCMP
#
$CMP Si4730-D60-GU
D AM/FM Broadcast Radio Receiver
K Broadcast AM FM Radio Receiver
F http://www.silabs.com/Support%20Documents/TechnicalDocs/Si4730-31-34-35-D60.pdf
$ENDCMP
#
$CMP Si4731-D60-GU
D AM/FM Broadcast Radio Receiver with RDS/RBDS
K Broadcast AM FM Radio Receiver RDS RBDS
F http://www.silabs.com/Support%20Documents/TechnicalDocs/Si4730-31-34-35-D60.pdf
$ENDCMP
#
$CMP Si4734-D60-GU
D AM/FM/SW/LW Broadcast Radio Receiver
K Broadcast AM FM SW LW Radio Receiver
F http://www.silabs.com/Support%20Documents/TechnicalDocs/Si4730-31-34-35-D60.pdf
$ENDCMP
#
$CMP Si4735-D60-GU
D AM/FM/SW/LW Broadcast Radio Receiver with RDS/RBDS
K Broadcast AM FM SW LW Radio Receiver RDS RBDS
F http://www.silabs.com/Support%20Documents/TechnicalDocs/Si4730-31-34-35-D60.pdf
$ENDCMP
#
#End Doc Library

253
pcbs/backplane/myLibs/silabs.lib
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EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# CP2102N-A01-GQFN24
#
DEF CP2102N-A01-GQFN24 U 0 40 Y Y 1 F N
F0 "U" -200 875 50 H V R CNN
F1 "CP2102N-A01-GQFN24" -200 800 50 H V R CNN
F2 "Housings_DFN_QFN:QFN-24-1EP_4x4mm_Pitch0.5mm" 450 -800 50 H I L CNN
F3 "" 50 -1050 50 H I C CNN
$FPLIST
QFN*4x4mm*Pitch0.5mm*
$ENDFPLIST
DRAW
S -450 750 450 -750 0 1 10 f
X RI/CLK 1 600 600 150 L 50 50 1 1 B
X GND 2 100 -900 150 U 50 50 1 1 W
X D+ 3 -600 -400 150 R 50 50 1 1 B
X D- 4 -600 -500 150 R 50 50 1 1 B
X VIO 5 0 900 150 D 50 50 1 1 W
X VDD 6 -100 900 150 D 50 50 1 1 W
X REGIN 7 -600 0 150 R 50 50 1 1 W
X VBUS 8 -600 -300 150 R 50 50 1 1 I
X ~RSTb 9 -600 600 150 R 50 50 1 1 I
X NC 10 400 -900 150 U 50 50 1 1 N N
X RXD 20 600 300 150 L 50 50 1 1 I
X GPIO.3 11 600 -300 150 L 50 50 1 1 B
X TXD 21 600 200 150 L 50 50 1 1 O
X GPIO.2 12 600 -400 150 L 50 50 1 1 B
X DSR 22 600 100 150 L 50 50 1 1 I
X GPIO.1 13 600 -500 150 L 50 50 1 1 B
X DTR 23 600 0 150 L 50 50 1 1 O
X GPIO.0 14 600 -600 150 L 50 50 1 1 B
X DCD 24 600 -100 150 L 50 50 1 1 I
X ~SUSPENDb 15 -600 200 150 R 50 50 1 1 O
X GND 25 0 -900 150 U 50 50 1 1 W
X NC 16 300 -900 150 U 50 50 1 1 N N
X SUSPEND 17 -600 300 150 R 50 50 1 1 O
X CTS 18 600 500 150 L 50 50 1 1 I
X RTS 19 600 400 150 L 50 50 1 1 O
ENDDRAW
ENDDEF
#
# CP2104
#
DEF CP2104 U 0 40 Y Y 1 F N
F0 "U" -300 925 50 H V R CNN
F1 "CP2104" -300 850 50 H V R CNN
F2 "Housings_DFN_QFN:QFN-24-1EP_4x4mm_Pitch0.5mm" 150 -950 50 H I L CNN
F3 "" -550 1250 50 H I C CNN
$FPLIST
QFN*4x4mm*Pitch0.5mm*
$ENDFPLIST
DRAW
S -600 800 600 -900 0 1 10 f
X RI 1 700 600 100 L 50 50 1 1 I
X GND 2 0 -1000 100 U 50 50 1 1 W
X D+ 3 -700 0 100 R 50 50 1 1 B
X D- 4 -700 100 100 R 50 50 1 1 B
X VIO 5 -200 900 100 D 50 50 1 1 W
X VDD 6 0 900 100 D 50 50 1 1 W
X REGIN 7 -700 600 100 R 50 50 1 1 W
X VBUS 8 -700 400 100 R 50 50 1 1 I
X ~RST 9 700 -500 100 L 50 50 1 1 B
X VIO/NC 10 200 900 100 D 50 50 1 1 w
X RXD 20 700 0 100 L 50 50 1 1 I
X GPIO.3 11 -700 -500 100 R 50 50 1 1 B
X TXD 21 700 100 100 L 50 50 1 1 O
X GPIO.2 12 -700 -400 100 R 50 50 1 1 B
X DSR 22 700 300 100 L 50 50 1 1 I
X GPIO.1 13 -700 -300 100 R 50 50 1 1 B
X DTR 23 700 400 100 L 50 50 1 1 O
X GPIO.0 14 -700 -200 100 R 50 50 1 1 B
X DCD 24 700 500 100 L 50 50 1 1 I
X ~SUSPEND 15 700 -700 100 L 50 50 1 1 O
X PAD 25 100 -1000 100 U 50 50 1 1 W
X VPP 16 -700 -700 100 R 50 50 1 1 P
X SUSPEND 17 700 -600 100 L 50 50 1 1 O
X CTS 18 700 -300 100 L 50 50 1 1 I
X RTS 19 700 -200 100 L 50 50 1 1 O
ENDDRAW
ENDDEF
#
# CP2112
#
DEF CP2112 U 0 40 Y Y 1 F N
F0 "U" -100 775 50 H V R CNN
F1 "CP2112" -100 700 50 H V R CNN
F2 "Housings_DFN_QFN:QFN-24-1EP_4x4mm_Pitch0.5mm" 450 -700 50 H I L CNN
F3 "" 50 -1000 50 H I C CNN
$FPLIST
QFN*4x4mm*Pitch0.5mm*
$ENDFPLIST
DRAW
S -450 650 450 -650 0 1 10 f
X SDA 1 600 500 150 L 50 50 1 1 B
X GND 2 100 -800 150 U 50 50 1 1 W
X D+ 3 -600 -400 150 R 50 50 1 1 B
X D- 4 -600 -500 150 R 50 50 1 1 B
X VIO 5 100 800 150 D 50 50 1 1 W
X VDD 6 0 800 150 D 50 50 1 1 W
X REGIN 7 -600 -100 150 R 50 50 1 1 W
X VBUS 8 -600 -300 150 R 50 50 1 1 I
X ~RST 9 -600 500 150 R 50 50 1 1 I
X NC 10 400 -800 150 U 50 50 1 1 N N
X GPIO.3 20 600 -100 150 L 50 50 1 1 B
X SUSPEND 11 -600 200 150 R 50 50 1 1 O
X GPIO.2 21 600 0 150 L 50 50 1 1 B
X GPIO.7 12 600 -500 150 L 50 50 1 1 B
X GPIO.1 22 600 100 150 L 50 50 1 1 B
X GPIO.6 13 600 -400 150 L 50 50 1 1 B
X GPIO.0 23 600 200 150 L 50 50 1 1 B
X GPIO.5 14 600 -300 150 L 50 50 1 1 B
X SCL 24 600 400 150 L 50 50 1 1 O
X GPIO.4 15 600 -200 150 L 50 50 1 1 B
X GND 25 0 -800 150 U 50 50 1 1 W
X VPP 16 -600 0 150 R 50 50 1 1 W
X ~SUSPEND 17 -600 300 150 R 50 50 1 1 O
X NC 18 200 -800 150 U 50 50 1 1 N N
X NC 19 300 -800 150 U 50 50 1 1 N N
ENDDRAW
ENDDEF
#
# Si3210
#
DEF Si3210 U 0 40 Y Y 1 F N
F0 "U" -550 1425 50 H V R CNN
F1 "Si3210" -550 1350 50 H V R CNN
F2 "Housings_SSOP:TSSOP-38_4.4x9.7mm_Pitch0.5mm" 250 1400 50 H I L CNN
F3 "" 3500 -2650 50 H I C CNN
$FPLIST
TSSOP*
$ENDFPLIST
DRAW
S -800 1300 800 -1400 0 1 10 f
X ~CS 1 1000 600 200 L 50 50 1 1 I
X ~INT 2 1000 -100 200 L 50 50 1 1 O
X PCLK 3 1000 300 200 L 50 50 1 1 I
X DRX 4 1000 200 200 L 50 50 1 1 I
X DTX 5 1000 100 200 L 50 50 1 1 O
X FSYNC 6 1000 400 200 L 50 50 1 1 I
X ~RESET 7 1000 -200 200 L 50 50 1 1 I
X SDCH 8 -300 -1600 200 U 50 50 1 1 O
X SDCL 9 -400 -1600 200 U 50 50 1 1 O
X VDDA1 10 -200 1500 200 D 50 50 1 1 W
X STIPAC 20 -1000 700 200 R 50 50 1 1 I
X VDDD 30 200 1500 200 D 50 50 1 1 W
X IREF 11 1000 -700 200 L 50 50 1 1 O
X SRINGAC 21 -1000 -900 200 R 50 50 1 1 I
X GNDD 31 100 -1600 200 U 50 50 1 1 W
X CAPP 12 1000 -800 200 L 50 50 1 1 O
X IGMN 22 1000 -500 200 L 50 50 1 1 O
X TEST 32 -1000 1000 200 R 50 50 1 1 I
X QGND 13 1000 -1000 200 L 50 50 1 1 W
X GNDA 23 300 -1600 200 U 50 50 1 1 W
X DCFF 33 -100 -1600 200 U 50 50 1 1 O
X CAPM 14 1000 -900 200 L 50 50 1 1 O
X IGMP 24 1000 -400 200 L 50 50 1 1 O
X DCDRV 34 -200 -1600 200 U 50 50 1 1 O
X STIPDC 15 -1000 800 200 R 50 50 1 1 I
X IRINGN 25 -1000 200 200 R 50 50 1 1 I
X SDITHRU 35 1000 800 200 L 50 50 1 1 O
X SRINGDC 16 -1000 -1000 200 R 50 50 1 1 I
X IRINGP 26 -1000 0 200 R 50 50 1 1 I
X SDO 36 1000 700 200 L 50 50 1 1 O
X STIPE 17 -1000 -100 200 R 50 50 1 1 I
X VDDA2 27 0 1500 200 D 50 50 1 1 W
X SDI 37 1000 900 200 L 50 50 1 1 I
X SVBAT 18 -1000 -500 200 R 50 50 1 1 I
X ITIPP 28 -1000 100 200 R 50 50 1 1 I
X SCLK 38 1000 1000 200 L 50 50 1 1 I
X SRINGE 19 -1000 -200 200 R 50 50 1 1 I
X ITIPN 29 -1000 300 200 R 50 50 1 1 I
ENDDRAW
ENDDEF
#
# Si4362
#
DEF Si4362 U 0 40 Y Y 1 F N
F0 "U" -200 775 50 H V R CNN
F1 "Si4362" -200 700 50 H V R CNN
F2 "Housings_DFN_QFN:QFN-20-1EP_4x4mm_Pitch0.5mm" 350 -700 50 H I L CNN
F3 "" 50 -1000 50 H I C CNN
$FPLIST
QFN*4x4mm*Pitch0.5mm*
$ENDFPLIST
DRAW
S -450 650 450 -650 0 1 10 f
X SDN 1 -600 500 150 R 50 50 1 1 I
X RXp 2 -600 400 150 R 50 50 1 1 I
X RXn 3 -600 300 150 R 50 50 1 1 I
X NC 4 100 -800 150 U 50 50 1 1 N N
X NC 5 200 -800 150 U 50 50 1 1 N N
X VDD 6 -100 800 150 D 50 50 1 1 W
X NC 7 300 -800 150 U 50 50 1 1 N N
X VDD 8 0 800 150 D 50 50 1 1 W
X GPIO0 9 600 500 150 L 50 50 1 1 B
X GPIO1 10 600 400 150 L 50 50 1 1 B
X GPIO3 20 600 200 150 L 50 50 1 1 B
X ~IRQ 11 600 -500 150 L 50 50 1 1 O
X GND 21 -100 -800 150 U 50 50 1 1 W
X SCLK 12 600 -400 150 L 50 50 1 1 I C
X SDO 13 600 -300 150 L 50 50 1 1 O
X SDI 14 600 -200 150 L 50 50 1 1 I
X ~SEL 15 600 -100 150 L 50 50 1 1 I
X XOUT 16 -600 -200 150 R 50 50 1 1 O
X XIN 17 -600 -100 150 R 50 50 1 1 I
X GND 18 0 -800 150 U 50 50 1 1 W
X GPIO2 19 600 300 150 L 50 50 1 1 B
ENDDRAW
ENDDEF
#
# Si4735-D60-GU
#
DEF Si4735-D60-GU U 0 40 Y Y 1 F N
F0 "U" -200 775 50 H V R CNN
F1 "Si4735-D60-GU" -200 700 50 H V R CNN
F2 "Housings_SSOP:SSOP-24_3.9x8.7mm_Pitch0.635mm" 250 -700 50 H I L CNN
F3 "" 50 -1000 50 H I C CNN
ALIAS Si4734-D60-GU Si4731-D60-GU Si4730-D60-GU
$FPLIST
SSOP-24_3.9x8.7mm_Pitch0.635mm*
$ENDFPLIST
DRAW
S 450 650 -450 -650 0 1 10 f
X DOUT 1 600 300 150 L 50 50 1 1 O
X DFS 2 600 0 150 L 50 50 1 1 I
X GPO3/[DCLK] 3 -600 -200 150 R 50 50 1 1 B
X GPO2/[~INT~] 4 -600 -300 150 R 50 50 1 1 O
X GPO1 5 -600 -400 150 R 50 50 1 1 O
X NC 6 -600 -500 150 R 50 50 1 1 N N
X NC 7 600 -500 150 L 50 50 1 1 N N
X FMI 8 600 -300 150 L 50 50 1 1 I
X RFGND 9 600 -400 150 L 50 50 1 1 W
X NC 10 -200 -800 150 U 50 50 1 1 N N
X VD 20 -100 800 150 D 50 50 1 1 W
X NC 11 200 -800 150 U 50 50 1 1 N N
X VA 21 100 800 150 D 50 50 1 1 W
X AMI 12 600 -200 150 L 50 50 1 1 I
X DBYP 22 600 500 150 L 50 50 1 1 P
X GND 13 -100 -800 150 U 50 50 1 1 W
X ROUT/[DOUT] 23 600 200 150 L 50 50 1 1 O
X GND 14 100 -800 150 U 50 50 1 1 W
X LOUT/[DFS] 24 600 100 150 L 50 50 1 1 B
X ~RST 15 -600 500 150 R 50 50 1 1 I
X ~SEN 16 -600 300 150 R 50 50 1 1 I
X SCLK 17 -600 100 150 R 50 50 1 1 I C
X SDIO 18 -600 200 150 R 50 50 1 1 B
X RCLK 19 -600 0 150 R 50 50 1 1 I C
ENDDRAW
ENDDEF
#
#End Library

17
pcbs/backplane/myUSB.pretty/USB3075-30-A.kicad_mod
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@ -0,0 +1,17 @@
(module USB3075-30-A (layer F.Cu) (tedit 5948E45D)
(fp_text reference REF** (at 0 3.81) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value USB3075-30-A (at 0 -5.08) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 2 smd rect (at 4.875 -2.65) (size 0.4 1.4) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at 4.225 -2.65) (size 0.4 1.4) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at 3.575 -2.65) (size 0.4 1.4) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at 2.925 -2.65) (size 0.4 1.4) (layers F.Cu F.Paste F.Mask))
(pad 1 smd rect (at 2.275 -2.65) (size 0.4 1.4) (layers F.Cu F.Paste F.Mask))
(pad "" smd rect (at 4.825 0) (size 1.75 1.9) (layers F.Cu F.Paste F.Mask))
(pad "" thru_hole oval (at 7.15 0) (size 1.05 1.9) (drill oval 0.45 1.2) (layers *.Cu *.Mask))
(pad "" thru_hole oval (at 0 0) (size 1.05 1.9) (drill oval 0.45 1.2) (layers *.Cu *.Mask))
(pad "" smd rect (at 2.325 0) (size 1.75 1.9) (layers F.Cu F.Paste F.Mask))
)

25
pcbs/backplane/myUSB.pretty/USB3145-30-1-A.kicad_mod
View File

@ -0,0 +1,25 @@
(module USB3145-30-1-A (layer F.Cu) (tedit 5948FD91)
(fp_text reference P3 (at 1.905 3.175) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value USB_B (at 6.985 -3.175) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.762 -2.286) (end -0.762 2.286) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.762 2.286) (end 7.874 2.286) (layer F.CrtYd) (width 0.05))
(fp_line (start 7.874 2.286) (end 7.874 -2.286) (layer F.CrtYd) (width 0.05))
(fp_line (start 7.874 -2.286) (end -0.762 -2.286) (layer F.CrtYd) (width 0.05))
(fp_line (start 7.15 1.175) (end 7.15 1.975) (layer F.SilkS) (width 0.15))
(fp_line (start 7.15 -2) (end 7.15 -1.2) (layer F.SilkS) (width 0.15))
(fp_line (start 0 1.175) (end 0 1.975) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -2) (end 0 -1.2) (layer F.SilkS) (width 0.15))
(fp_line (start 0 2) (end 7.15 2) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -2) (end 7.15 -2) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole circle (at 2.275 0.11) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask))
(pad 4 thru_hole circle (at 4.225 1.11) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask))
(pad 5 thru_hole circle (at 4.875 0.11) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask))
(pad 2 thru_hole circle (at 2.925 1.11) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask))
(pad "" thru_hole oval (at 7.15 0) (size 0.75 1.55) (drill oval 0.35 1.15) (layers *.Cu *.Mask))
(pad "" thru_hole oval (at 0 0) (size 0.75 1.55) (drill oval 0.35 1.15) (layers *.Cu *.Mask))
(pad 3 thru_hole circle (at 3.575 0.11) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask))
)

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pcbs/backplane/output/electrical_spec_interface.pdf
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pcbs/backplane/output/mechanical_spec_interface.pdf
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