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77 lines
2.2 KiB
77 lines
2.2 KiB
library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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entity string_sender is
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port (
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i_clk :in std_logic;
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i_send_clk :in std_logic;
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i_sent :in std_logic;
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i_reset_n :in std_logic;
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o_send :out std_logic;
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o_char :out std_logic_vector(7 downto 0)
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);
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end;
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architecture string_sender_rtl of string_sender is
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type z_sender_t is (
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idle,
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wait_for_transmission,
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sending
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);
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--Function to convert one char to std_logic_vector with 8 bit
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function f_char_to_vector(
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i_char : in character)
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return std_logic_vector is
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variable v_ret : std_logic_vector(7 downto 0);
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begin
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v_ret := std_logic_vector(
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to_unsigned(natural(character'pos(i_char)),8)
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);
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return v_ret;
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end function f_char_to_vector;
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begin
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string_sender_main_proc: process(i_clk)
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constant c_msg : string(1 to 13) := "Hello World!" & LF;
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variable v_ind : integer range 0 to c_msg'length := 1;
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variable v_old_clk : std_logic := '1';
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variable z_sender : z_sender_t := idle;
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begin
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if rising_edge(i_clk) then
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if i_reset_n = '0' then
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v_ind := 1;
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v_old_clk := i_send_clk;
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z_sender := idle;
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o_send <= '0';
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o_char <= (others => '0');
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else
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case z_sender is
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when idle =>
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if (i_send_clk /= v_old_clk) then
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v_old_clk := i_send_clk;
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if (i_sent = '1') then
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o_char <= f_char_to_vector(c_msg(v_ind));
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o_send <= '1';
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if v_ind = c_msg'length then
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v_ind := 1;
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else
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v_ind := v_ind + 1;
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end if;
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z_sender := wait_for_transmission;
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end if;
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end if;
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when wait_for_transmission =>
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if i_sent = '0' then
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o_send <= '0';
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z_sender := sending;
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end if;
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when sending =>
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if (i_sent = '1') then
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z_sender := idle;
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end if;
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end case;
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end if; -- reset
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end if; -- clk
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end process string_sender_main_proc;
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end;
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