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UppSense2017
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3 Commits (c0be6c2d1fd49ef1db8f5f9414b4bfeb0e4ff818)

Author SHA1 Message Date
Maximilian Stiefel fca107fd91 Ananlog v0.33 is ready.
8 years ago
Maximilian Stiefel 1d4b26b1ab Cleaning.
8 years ago
Maximilian Stiefel 9bc39d12a9 Four boards in less than two weeks :D
8 years ago
Maximilian Stiefel 84f2bb2e7c Added BOMs and gerber files.
8 years ago
Maximilian Stiefel 8eb34192c4 Finished the photo extender, backplane and the analog board.
8 years ago
Maximilian Stiefel 500e5c9dcb Backplane definitely finished. Somethings wrong with TIA. Has to be checked tomorrow.
8 years ago
Maximilian Stiefel 98277b6869 Added some iportant backplane spec.
8 years ago
Maximilian Stiefel 8f7adcfc2e Finished schematics of the analog_board_v0.2 today.
8 years ago
Maximilian Stiefel 269583d92d Simulated the new transimpedance amp.
8 years ago