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Updated electrical spec.

master
Maximilian Stiefel 7 years ago
parent
e4921fc09f
commit
1fa5482f46
14 changed files with 1194 additions and 573 deletions
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  1. BIN
      docs/datasheets/ch340g-datasheet.pdf
  2. BIN
      docs/schematics/NODEMCU_DEVKIT_SCH.png
  3. 8
      ltspice/current_source_max/driver_option1.log
  4. BIN
      ltspice/current_source_max/driver_option1.op.raw
  5. BIN
      ltspice/current_source_max/driver_option1.raw
  6. BIN
      octave/octave-workspace
  7. 705
      pcbs/backplane/_autosave-backplane.kicad_pcb
  8. 166
      pcbs/backplane/backplane-cache.lib
  9. 239
      pcbs/backplane/backplane.bak
  10. 359
      pcbs/backplane/backplane.net
  11. 23
      pcbs/backplane/backplane.pro
  12. 235
      pcbs/backplane/backplane.sch
  13. 32
      pcbs/backplane/myLibs/ch340g.lib
  14. BIN
      pcbs/backplane/output/electrical_spec_interface.pdf

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docs/datasheets/ch340g-datasheet.pdf
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docs/schematics/NODEMCU_DEVKIT_SCH.png
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8
ltspice/current_source_max/driver_option1.log
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@ -45,8 +45,8 @@ Source stepping succeeded in finding the operating point.
.step rjump=10000
.step rjump=50000
Date: Wed Jun 14 12:51:56 2017
Total elapsed time: 0.755 seconds.
Date: Fri Jun 23 11:48:52 2017
Total elapsed time: 0.769 seconds.
tnom = 27
temp = 27
@ -59,6 +59,6 @@ rejected = 0
matrix size = 56
fillins = 60
solver = Normal
Matrix Compiler1: 5.52 KB object code size 2.0/0.8/[0.5]
Matrix Compiler2: 5.89 KB object code size 1.1/1.6/[0.8]
Matrix Compiler1: 5.52 KB object code size 1.8/0.8/[0.5]
Matrix Compiler2: 5.89 KB object code size 0.9/1.0/[0.7]

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ltspice/current_source_max/driver_option1.op.raw
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ltspice/current_source_max/driver_option1.raw
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octave/octave-workspace
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705
pcbs/backplane/_autosave-backplane.kicad_pcb
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@ -0,0 +1,705 @@
(kicad_pcb (version 4) (host pcbnew 4.0.5+dfsg1-4)
(general
(links 32)
(no_connects 32)
(area 40 41.25 197.85 136.350001)
(thickness 1.6)
(drawings 15)
(tracks 0)
(zones 0)
(modules 11)
(nets 21)
)
(page A4)
(title_block
(title "Backplane for UppSense")
(date 2017-06-20)
(rev 1.0)
(company "Uppsala University")
)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user)
(49 F.Fab user)
)
(setup
(last_trace_width 0.25)
(trace_clearance 0.2)
(zone_clearance 0.508)
(zone_45_only no)
(trace_min 0.2)
(segment_width 0.2)
(edge_width 0.15)
(via_size 0.6)
(via_drill 0.4)
(via_min_size 0.4)
(via_min_drill 0.3)
(uvia_size 0.3)
(uvia_drill 0.1)
(uvias_allowed no)
(uvia_min_size 0.2)
(uvia_min_drill 0.1)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.15)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 1.524 1.524)
(pad_drill 0.762)
(pad_to_mask_clearance 0.2)
(aux_axis_origin 0 0)
(visible_elements FFFFFF7F)
(pcbplotparams
(layerselection 0x00030_80000001)
(usegerberextensions false)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15)
(hpglpenoverlay 2)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 1)
(scaleselection 1)
(outputdirectory ""))
)
(net 0 "")
(net 1 VCC)
(net 2 GND)
(net 3 ADC1)
(net 4 ADC2)
(net 5 DAC1)
(net 6 ADC3)
(net 7 DAC2)
(net 8 PWM1)
(net 9 PWM2)
(net 10 SPI_CLK)
(net 11 SPI_MISO)
(net 12 SPI_MOSI)
(net 13 GPIO1)
(net 14 SPI_CS)
(net 15 GPIO2)
(net 16 I2C_SCL)
(net 17 GPIO3)
(net 18 I2C_SDA)
(net 19 GPIO4)
(net 20 UART_TX)
(net_class Default "This is the default net class."
(clearance 0.2)
(trace_width 0.25)
(via_dia 0.6)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net ADC1)
(add_net ADC2)
(add_net ADC3)
(add_net DAC1)
(add_net DAC2)
(add_net GND)
(add_net GPIO1)
(add_net GPIO2)
(add_net GPIO3)
(add_net GPIO4)
(add_net I2C_SCL)
(add_net I2C_SDA)
(add_net PWM1)
(add_net PWM2)
(add_net SPI_CLK)
(add_net SPI_CS)
(add_net SPI_MISO)
(add_net SPI_MOSI)
(add_net UART_TX)
(add_net VCC)
)
(module EuroBoard_Outline:EuroBoard_viertel_Type-I_80mmX50mm (layer F.Cu) (tedit 0) (tstamp 594B9E10)
(at 95 125)
(descr "Outline, Eurocard 1/4, Type I, 80x50mm,")
(tags "Outline, Eurocard 1/4, Type I, 80x50mm,")
(fp_text reference REF** (at 41.00068 -52.99964) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value EuroBoard_viertel_Type-I_80mmX50mm (at 41.9989 5.99948) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0 0) (end 0 -49.9999) (layer Edge.Cuts) (width 0.381))
(fp_line (start 0 -49.9999) (end 79.99984 -49.9999) (layer Edge.Cuts) (width 0.381))
(fp_line (start 79.99984 -49.9999) (end 79.99984 0) (layer Edge.Cuts) (width 0.381))
(fp_line (start 79.99984 0) (end 0 0) (layer Edge.Cuts) (width 0.381))
)
(module Mounting_Holes:MountingHole_3.2mm_M3_DIN965_Pad (layer F.Cu) (tedit 56D1B4CB) (tstamp 594BA990)
(at 100 80)
(descr "Mounting Hole 3.2mm, M3, DIN965")
(tags "mounting hole 3.2mm m3 din965")
(fp_text reference REF** (at 0 -3.8) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value MountingHole_3.2mm_M3_DIN965_Pad (at 0 3.8) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2.8 0) (layer Cmts.User) (width 0.15))
(fp_circle (center 0 0) (end 3.05 0) (layer F.CrtYd) (width 0.05))
(pad 1 thru_hole circle (at 0 0) (size 5.6 5.6) (drill 3.2) (layers *.Cu *.Mask))
)
(module Mounting_Holes:MountingHole_3.2mm_M3_DIN965_Pad (layer F.Cu) (tedit 56D1B4CB) (tstamp 594BA987)
(at 100 120)
(descr "Mounting Hole 3.2mm, M3, DIN965")
(tags "mounting hole 3.2mm m3 din965")
(fp_text reference REF** (at 0 -3.8) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value MountingHole_3.2mm_M3_DIN965_Pad (at 0 3.8) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2.8 0) (layer Cmts.User) (width 0.15))
(fp_circle (center 0 0) (end 3.05 0) (layer F.CrtYd) (width 0.05))
(pad 1 thru_hole circle (at 0 0) (size 5.6 5.6) (drill 3.2) (layers *.Cu *.Mask))
)
(module Mounting_Holes:MountingHole_3.2mm_M3_DIN965_Pad (layer F.Cu) (tedit 56D1B4CB) (tstamp 594BA980)
(at 170 120)
(descr "Mounting Hole 3.2mm, M3, DIN965")
(tags "mounting hole 3.2mm m3 din965")
(fp_text reference REF** (at 0 -3.8) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value MountingHole_3.2mm_M3_DIN965_Pad (at 0 3.8) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2.8 0) (layer Cmts.User) (width 0.15))
(fp_circle (center 0 0) (end 3.05 0) (layer F.CrtYd) (width 0.05))
(pad 1 thru_hole circle (at 0 0) (size 5.6 5.6) (drill 3.2) (layers *.Cu *.Mask))
)
(module Pin_Headers:Pin_Header_Straight_2x04 (layer F.Cu) (tedit 0) (tstamp 594B8A31)
(at 105 110 90)
(descr "Through hole pin header")
(tags "pin header")
(path /5948E65F)
(fp_text reference P1 (at 0 -5.1 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CONN_02X04 (at 0 -3.1 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.75 -1.75) (end -1.75 9.4) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.3 -1.75) (end 4.3 9.4) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 9.4) (end 4.3 9.4) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.27 1.27) (end -1.27 8.89) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 8.89) (end 3.81 8.89) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 8.89) (end 3.81 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 1 VCC))
(pad 2 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 2 GND))
(pad 3 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 3 ADC1))
(pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 2 GND))
(pad 5 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 4 ADC2))
(pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 5 DAC1))
(pad 7 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 6 ADC3))
(pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 7 DAC2))
(model Pin_Headers.3dshapes/Pin_Header_Straight_2x04.wrl
(at (xyz 0.05 -0.15 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
)
)
(module Pin_Headers:Pin_Header_Straight_2x09 (layer F.Cu) (tedit 0) (tstamp 594B8C7A)
(at 145 117.7 90)
(descr "Through hole pin header")
(tags "pin header")
(path /5948FBD0)
(fp_text reference P4 (at 0 -5.1 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CONN_02X09 (at 0 -3.1 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.75 -1.75) (end -1.75 22.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.3 -1.75) (end 4.3 22.1) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 22.1) (end 4.3 22.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.81 21.59) (end 3.81 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 1.27) (end -1.27 21.59) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 21.59) (end -1.27 21.59) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 1 VCC))
(pad 2 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 8 PWM1))
(pad 3 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 2 GND))
(pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 9 PWM2))
(pad 5 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 10 SPI_CLK))
(pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 5 DAC1))
(pad 7 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 11 SPI_MISO))
(pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 7 DAC2))
(pad 9 thru_hole oval (at 0 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 12 SPI_MOSI))
(pad 10 thru_hole oval (at 2.54 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 13 GPIO1))
(pad 11 thru_hole oval (at 0 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 14 SPI_CS))
(pad 12 thru_hole oval (at 2.54 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 15 GPIO2))
(pad 13 thru_hole oval (at 0 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 16 I2C_SCL))
(pad 14 thru_hole oval (at 2.54 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 17 GPIO3))
(pad 15 thru_hole oval (at 0 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 18 I2C_SDA))
(pad 16 thru_hole oval (at 2.54 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 19 GPIO4))
(pad 17 thru_hole oval (at 0 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 20 UART_TX))
(pad 18 thru_hole oval (at 2.54 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 20 UART_TX))
(model Pin_Headers.3dshapes/Pin_Header_Straight_2x09.wrl
(at (xyz 0.05 -0.4 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
)
)
(module Pin_Headers:Pin_Header_Straight_2x04 (layer F.Cu) (tedit 0) (tstamp 594B9D1B)
(at 105 90 90)
(descr "Through hole pin header")
(tags "pin header")
(path /59490E80)
(fp_text reference P2 (at 0 -5.1 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CONN_02X04 (at 0 -3.1 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.75 -1.75) (end -1.75 9.4) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.3 -1.75) (end 4.3 9.4) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 9.4) (end 4.3 9.4) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.27 1.27) (end -1.27 8.89) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 8.89) (end 3.81 8.89) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 8.89) (end 3.81 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 1 VCC))
(pad 2 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 2 GND))
(pad 3 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 3 ADC1))
(pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 2 GND))
(pad 5 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 4 ADC2))
(pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 5 DAC1))
(pad 7 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 6 ADC3))
(pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 7 DAC2))
(model Pin_Headers.3dshapes/Pin_Header_Straight_2x04.wrl
(at (xyz 0.05 -0.15 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
)
)
(module Pin_Headers:Pin_Header_Straight_2x09 (layer F.Cu) (tedit 0) (tstamp 594B9D3D)
(at 145 97.7 90)
(descr "Through hole pin header")
(tags "pin header")
(path /59490EE5)
(fp_text reference P5 (at 0 -5.1 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CONN_02X09 (at 0 -3.1 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.75 -1.75) (end -1.75 22.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.3 -1.75) (end 4.3 22.1) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 22.1) (end 4.3 22.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.81 21.59) (end 3.81 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 1.27) (end -1.27 21.59) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 21.59) (end -1.27 21.59) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 1 VCC))
(pad 2 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 8 PWM1))
(pad 3 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 2 GND))
(pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 9 PWM2))
(pad 5 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 10 SPI_CLK))
(pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 5 DAC1))
(pad 7 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 11 SPI_MISO))
(pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 7 DAC2))
(pad 9 thru_hole oval (at 0 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 12 SPI_MOSI))
(pad 10 thru_hole oval (at 2.54 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 13 GPIO1))
(pad 11 thru_hole oval (at 0 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 14 SPI_CS))
(pad 12 thru_hole oval (at 2.54 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 15 GPIO2))
(pad 13 thru_hole oval (at 0 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 16 I2C_SCL))
(pad 14 thru_hole oval (at 2.54 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 17 GPIO3))
(pad 15 thru_hole oval (at 0 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 18 I2C_SDA))
(pad 16 thru_hole oval (at 2.54 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 19 GPIO4))
(pad 17 thru_hole oval (at 0 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 20 UART_TX))
(pad 18 thru_hole oval (at 2.54 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 20 UART_TX))
(model Pin_Headers.3dshapes/Pin_Header_Straight_2x09.wrl
(at (xyz 0.05 -0.4 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
)
)
(module Housings_SSOP:SSOP-28_5.3x10.2mm_Pitch0.65mm (layer F.Cu) (tedit 54130A77) (tstamp 594B9D6D)
(at 130 100)
(descr "28-Lead Plastic Shrink Small Outline (SS)-5.30 mm Body [SSOP] (see Microchip Packaging Specification 00000049BS.pdf)")
(tags "SSOP 0.65")
(path /59490896)
(attr smd)
(fp_text reference U1 (at 0 -6.25) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value FT232RL (at 0 6.25) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.65 -5.1) (end 2.65 -5.1) (layer F.Fab) (width 0.15))
(fp_line (start 2.65 -5.1) (end 2.65 5.1) (layer F.Fab) (width 0.15))
(fp_line (start 2.65 5.1) (end -2.65 5.1) (layer F.Fab) (width 0.15))
(fp_line (start -2.65 5.1) (end -2.65 -4.1) (layer F.Fab) (width 0.15))
(fp_line (start -2.65 -4.1) (end -1.65 -5.1) (layer F.Fab) (width 0.15))
(fp_line (start -4.75 -5.5) (end -4.75 5.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.75 -5.5) (end 4.75 5.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -4.75 -5.5) (end 4.75 -5.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -4.75 5.5) (end 4.75 5.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.875 -5.325) (end -2.875 -4.75) (layer F.SilkS) (width 0.15))
(fp_line (start 2.875 -5.325) (end 2.875 -4.675) (layer F.SilkS) (width 0.15))
(fp_line (start 2.875 5.325) (end 2.875 4.675) (layer F.SilkS) (width 0.15))
(fp_line (start -2.875 5.325) (end -2.875 4.675) (layer F.SilkS) (width 0.15))
(fp_line (start -2.875 -5.325) (end 2.875 -5.325) (layer F.SilkS) (width 0.15))
(fp_line (start -2.875 5.325) (end 2.875 5.325) (layer F.SilkS) (width 0.15))
(fp_line (start -2.875 -4.75) (end -4.475 -4.75) (layer F.SilkS) (width 0.15))
(pad 1 smd rect (at -3.6 -4.225) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -3.6 -3.575) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at -3.6 -2.925) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at -3.6 -2.275) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at -3.6 -1.625) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at -3.6 -0.975) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at -3.6 -0.325) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at -3.6 0.325) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 9 smd rect (at -3.6 0.975) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 10 smd rect (at -3.6 1.625) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 11 smd rect (at -3.6 2.275) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 12 smd rect (at -3.6 2.925) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 13 smd rect (at -3.6 3.575) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 14 smd rect (at -3.6 4.225) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 15 smd rect (at 3.6 4.225) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 16 smd rect (at 3.6 3.575) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 17 smd rect (at 3.6 2.925) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 18 smd rect (at 3.6 2.275) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 19 smd rect (at 3.6 1.625) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 20 smd rect (at 3.6 0.975) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 21 smd rect (at 3.6 0.325) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 22 smd rect (at 3.6 -0.325) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 23 smd rect (at 3.6 -0.975) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 24 smd rect (at 3.6 -1.625) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 25 smd rect (at 3.6 -2.275) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 26 smd rect (at 3.6 -2.925) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 27 smd rect (at 3.6 -3.575) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(pad 28 smd rect (at 3.6 -4.225) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask))
(model Housings_SSOP.3dshapes/SSOP-28_5.3x10.2mm_Pitch0.65mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Mounting_Holes:MountingHole_3.2mm_M3_DIN965_Pad (layer F.Cu) (tedit 56D1B4CB) (tstamp 594BA977)
(at 170 80)
(descr "Mounting Hole 3.2mm, M3, DIN965")
(tags "mounting hole 3.2mm m3 din965")
(fp_text reference REF** (at 0 -3.8) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value MountingHole_3.2mm_M3_DIN965_Pad (at 0 3.8) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2.8 0) (layer Cmts.User) (width 0.15))
(fp_circle (center 0 0) (end 3.05 0) (layer F.CrtYd) (width 0.05))
(pad 1 thru_hole circle (at 0 0) (size 5.6 5.6) (drill 3.2) (layers *.Cu *.Mask))
)
(module MyUSB:USB3145-30-1-A (layer F.Cu) (tedit 5948FD91) (tstamp 594BAB18)
(at 125 80)
(path /5948EBA5)
(fp_text reference P3 (at 1.905 3.175) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value USB_B (at 6.985 -3.175) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.762 -2.286) (end -0.762 2.286) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.762 2.286) (end 7.874 2.286) (layer F.CrtYd) (width 0.05))
(fp_line (start 7.874 2.286) (end 7.874 -2.286) (layer F.CrtYd) (width 0.05))
(fp_line (start 7.874 -2.286) (end -0.762 -2.286) (layer F.CrtYd) (width 0.05))
(fp_line (start 7.15 1.175) (end 7.15 1.975) (layer F.SilkS) (width 0.15))
(fp_line (start 7.15 -2) (end 7.15 -1.2) (layer F.SilkS) (width 0.15))
(fp_line (start 0 1.175) (end 0 1.975) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -2) (end 0 -1.2) (layer F.SilkS) (width 0.15))
(fp_line (start 0 2) (end 7.15 2) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -2) (end 7.15 -2) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole circle (at 2.275 0.11) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask))
(pad 4 thru_hole circle (at 4.225 1.11) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask))
(pad 5 thru_hole circle (at 4.875 0.11) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask))
(pad 2 thru_hole circle (at 2.925 1.11) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask))
(pad "" thru_hole oval (at 7.15 0) (size 0.75 1.55) (drill oval 0.35 1.15) (layers *.Cu *.Mask))
(pad "" thru_hole oval (at 0 0) (size 0.75 1.55) (drill oval 0.35 1.15) (layers *.Cu *.Mask))
(pad 3 thru_hole circle (at 3.575 0.11) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask))
)
(dimension 10 (width 0.3) (layer Dwgs.User)
(gr_text "10,000 mm" (at 100 134) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 95 110) (xy 95 132.7)))
(feature2 (pts (xy 105 110) (xy 105 132.7)))
(crossbar (pts (xy 105 130) (xy 95 130)))
(arrow1a (pts (xy 95 130) (xy 96.126504 129.413579)))
(arrow1b (pts (xy 95 130) (xy 96.126504 130.586421)))
(arrow2a (pts (xy 105 130) (xy 103.873496 129.413579)))
(arrow2b (pts (xy 105 130) (xy 103.873496 130.586421)))
)
(dimension 30 (width 0.3) (layer Dwgs.User)
(gr_text "30,000 mm" (at 160 110.65) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 175 119) (xy 175 109.3)))
(feature2 (pts (xy 145 119) (xy 145 109.3)))
(crossbar (pts (xy 145 112) (xy 175 112)))
(arrow1a (pts (xy 175 112) (xy 173.873496 112.586421)))
(arrow1b (pts (xy 175 112) (xy 173.873496 111.413579)))
(arrow2a (pts (xy 145 112) (xy 146.126504 112.586421)))
(arrow2b (pts (xy 145 112) (xy 146.126504 111.413579)))
)
(dimension 30 (width 0.3) (layer Dwgs.User)
(gr_text "30,000 mm" (at 160 102.35) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 175 97) (xy 175 103.7)))
(feature2 (pts (xy 145 97) (xy 145 103.7)))
(crossbar (pts (xy 145 101) (xy 175 101)))
(arrow1a (pts (xy 175 101) (xy 173.873496 101.586421)))
(arrow1b (pts (xy 175 101) (xy 173.873496 100.413579)))
(arrow2a (pts (xy 145 101) (xy 146.126504 101.586421)))
(arrow2b (pts (xy 145 101) (xy 146.126504 100.413579)))
)
(dimension 5 (width 0.3) (layer Dwgs.User)
(gr_text "5,000 mm" (at 189 123 270) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 170 125) (xy 186.7 125)))
(feature2 (pts (xy 170 120) (xy 186.7 120)))
(crossbar (pts (xy 184 120) (xy 184 125)))
(arrow1a (pts (xy 184 125) (xy 183.413579 123.873496)))
(arrow1b (pts (xy 184 125) (xy 184.586421 123.873496)))
(arrow2a (pts (xy 184 120) (xy 183.413579 121.126504)))
(arrow2b (pts (xy 184 120) (xy 184.586421 121.126504)))
)
(dimension 5 (width 0.3) (layer Dwgs.User)
(gr_text "5,000 mm" (at 174 135) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 175 120) (xy 175 133.7)))
(feature2 (pts (xy 170 120) (xy 170 133.7)))
(crossbar (pts (xy 170 131) (xy 175 131)))
(arrow1a (pts (xy 175 131) (xy 173.873496 131.586421)))
(arrow1b (pts (xy 175 131) (xy 173.873496 130.413579)))
(arrow2a (pts (xy 170 131) (xy 171.126504 131.586421)))
(arrow2b (pts (xy 170 131) (xy 171.126504 130.413579)))
)
(gr_text "Connectors are in an offset arrangement towards each other. This enables putting\none 90° angled connector above and one below the board -> more mechanical\nstability. Disadvantage: PCB thickness determines layout of backplane." (at 40 45) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)) (justify left))
)
(dimension 10 (width 0.3) (layer Dwgs.User)
(gr_text "10,000 mm" (at 102 95) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 95 90) (xy 95 95.7)))
(feature2 (pts (xy 105 90) (xy 105 95.7)))
(crossbar (pts (xy 105 93) (xy 95 93)))
(arrow1a (pts (xy 95 93) (xy 96.126504 92.413579)))
(arrow1b (pts (xy 95 93) (xy 96.126504 93.586421)))
(arrow2a (pts (xy 105 93) (xy 103.873496 92.413579)))
(arrow2b (pts (xy 105 93) (xy 103.873496 93.586421)))
)
(dimension 22.7 (width 0.3) (layer Dwgs.User)
(gr_text "22,700 mm" (at 191.35 86.35 90) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 145 75) (xy 192.7 75)))
(feature2 (pts (xy 145 97.7) (xy 192.7 97.7)))
(crossbar (pts (xy 190 97.7) (xy 190 75)))
(arrow1a (pts (xy 190 75) (xy 190.586421 76.126504)))
(arrow1b (pts (xy 190 75) (xy 189.413579 76.126504)))
(arrow2a (pts (xy 190 97.7) (xy 190.586421 96.573496)))
(arrow2b (pts (xy 190 97.7) (xy 189.413579 96.573496)))
)
(dimension 30 (width 0.3) (layer Dwgs.User)
(gr_text "30,000 mm" (at 107 80) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 95 80) (xy 95 84.7)))
(feature2 (pts (xy 125 80) (xy 125 84.7)))
(crossbar (pts (xy 125 82) (xy 95 82)))
(arrow1a (pts (xy 95 82) (xy 96.126504 81.413579)))
(arrow1b (pts (xy 95 82) (xy 96.126504 82.586421)))
(arrow2a (pts (xy 125 82) (xy 123.873496 81.413579)))
(arrow2b (pts (xy 125 82) (xy 123.873496 82.586421)))
)
(dimension 5 (width 0.3) (layer Dwgs.User)
(gr_text "5,000 mm" (at 116 75 90) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 125 75) (xy 118.3 75)))
(feature2 (pts (xy 125 80) (xy 118.3 80)))
(crossbar (pts (xy 121 80) (xy 121 75)))
(arrow1a (pts (xy 121 75) (xy 121.586421 76.126504)))
(arrow1b (pts (xy 121 75) (xy 120.413579 76.126504)))
(arrow2a (pts (xy 121 80) (xy 121.586421 78.873496)))
(arrow2b (pts (xy 121 80) (xy 120.413579 78.873496)))
)
(dimension 7.7 (width 0.3) (layer Dwgs.User)
(gr_text "7,700 mm" (at 87 114 90) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 145 110) (xy 90.9 110)))
(feature2 (pts (xy 145 117.7) (xy 90.9 117.7)))
(crossbar (pts (xy 93.6 117.7) (xy 93.6 110)))
(arrow1a (pts (xy 93.6 110) (xy 94.186421 111.126504)))
(arrow1b (pts (xy 93.6 110) (xy 93.013579 111.126504)))
(arrow2a (pts (xy 93.6 117.7) (xy 94.186421 116.573496)))
(arrow2b (pts (xy 93.6 117.7) (xy 93.013579 116.573496)))
)
(dimension 15 (width 0.3) (layer Dwgs.User)
(gr_text "15,000 mm" (at 78 82 90) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 105 75) (xy 77.3 75)))
(feature2 (pts (xy 105 90) (xy 77.3 90)))
(crossbar (pts (xy 80 90) (xy 80 75)))
(arrow1a (pts (xy 80 75) (xy 80.586421 76.126504)))
(arrow1b (pts (xy 80 75) (xy 79.413579 76.126504)))
(arrow2a (pts (xy 80 90) (xy 80.586421 88.873496)))
(arrow2b (pts (xy 80 90) (xy 79.413579 88.873496)))
)
(gr_text "+ 2 x Distance PCB-1stRow-TSW-109-XX-G-D-RA, 1.78 mm\n+ PCB Thickness, 1.6 mm \n+ Pitch, 2.54 mm\n-----------------------------------------\n7.7 mm\n " (at 40 61) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)) (justify left))
)
(dimension 7.7 (width 0.3) (layer Dwgs.User)
(gr_text "7,700 mm" (at 87 96 90) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 145 90) (xy 90.3 90)))
(feature2 (pts (xy 145 97.7) (xy 90.3 97.7)))
(crossbar (pts (xy 93 97.7) (xy 93 90)))
(arrow1a (pts (xy 93 90) (xy 93.586421 91.126504)))
(arrow1b (pts (xy 93 90) (xy 92.413579 91.126504)))
(arrow2a (pts (xy 93 97.7) (xy 93.586421 96.573496)))
(arrow2b (pts (xy 93 97.7) (xy 92.413579 96.573496)))
)
(dimension 80 (width 0.3) (layer Dwgs.User)
(gr_text "80,000 mm" (at 135 129.35) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 175 125) (xy 175 130.7)))
(feature2 (pts (xy 95 125) (xy 95 130.7)))
(crossbar (pts (xy 95 128) (xy 175 128)))
(arrow1a (pts (xy 175 128) (xy 173.873496 128.586421)))
(arrow1b (pts (xy 175 128) (xy 173.873496 127.413579)))
(arrow2a (pts (xy 95 128) (xy 96.126504 128.586421)))
(arrow2b (pts (xy 95 128) (xy 96.126504 127.413579)))
)
)

166
pcbs/backplane/backplane-cache.lib
View File

@ -1,55 +1,78 @@
EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# CONN_02X04
# CH340G
#
DEF CONN_02X04 P 0 1 Y N 1 F N
F0 "P" 0 250 50 H V C CNN
F1 "CONN_02X04" 0 -250 50 H V C CNN
DEF CH340G U 0 40 Y Y 1 F N
F0 "U" 0 -500 60 H V C CNN
F1 "CH340G" 0 500 60 H V C CNN
F2 "" 200 -650 60 H V C CNN
F3 "" 200 -650 60 H V C CNN
DRAW
S -300 450 300 -450 0 1 0 N
X GND 1 -500 350 200 R 50 50 1 1 P
X TXD 2 -500 250 200 R 50 50 1 1 O
X RXD 3 -500 150 200 R 50 50 1 1 I
X V3 4 -500 50 200 R 50 50 1 1 P
X UD+ 5 -500 -50 200 R 50 50 1 1 B
X UD- 6 -500 -150 200 R 50 50 1 1 B
X XI 7 -500 -250 200 R 50 50 1 1 I
X XO 8 -500 -350 200 R 50 50 1 1 O
X CTS 9 500 -350 200 L 50 50 1 1 I I
X DSR 10 500 -250 200 L 50 50 1 1 I I
X RI 11 500 -150 200 L 50 50 1 1 I I
X DCD 12 500 -50 200 L 50 50 1 1 I I
X DTR 13 500 50 200 L 50 50 1 1 O I
X RTS 14 500 150 200 L 50 50 1 1 O I
X R232 15 500 250 200 L 50 50 1 1 I I
X VCC 16 500 350 200 L 50 50 1 1 P I
ENDDRAW
ENDDEF
#
# CONN_02X03
#
DEF CONN_02X03 P 0 1 Y N 1 F N
F0 "P" 0 200 50 H V C CNN
F1 "CONN_02X03" 0 -200 50 H V C CNN
F2 "" 0 -1200 50 H V C CNN
F3 "" 0 -1200 50 H V C CNN
$FPLIST
Pin_Header_Straight_2X04
Pin_Header_Angled_2X04
Socket_Strip_Straight_2X04
Socket_Strip_Angled_2X04
Pin_Header_Straight_2X03
Pin_Header_Angled_2X03
Socket_Strip_Straight_2X03
Socket_Strip_Angled_2X03
$ENDFPLIST
DRAW
S -100 -145 -50 -155 0 1 0 N
S -100 -45 -50 -55 0 1 0 N
S -100 55 -50 45 0 1 0 N
S -100 155 -50 145 0 1 0 N
S -100 200 100 -200 0 1 0 N
S 50 -145 100 -155 0 1 0 N
S 50 -45 100 -55 0 1 0 N
S 50 55 100 45 0 1 0 N
S 50 155 100 145 0 1 0 N
X P1 1 -250 150 150 R 50 50 1 1 P
X P2 2 250 150 150 L 50 50 1 1 P
X P3 3 -250 50 150 R 50 50 1 1 P
X P4 4 250 50 150 L 50 50 1 1 P
X P5 5 -250 -50 150 R 50 50 1 1 P
X P6 6 250 -50 150 L 50 50 1 1 P
X P7 7 -250 -150 150 R 50 50 1 1 P
X P8 8 250 -150 150 L 50 50 1 1 P
S -100 -95 -50 -105 0 1 0 N
S -100 5 -50 -5 0 1 0 N
S -100 105 -50 95 0 1 0 N
S -100 150 100 -150 0 1 0 N
S 50 -95 100 -105 0 1 0 N
S 50 5 100 -5 0 1 0 N
S 50 105 100 95 0 1 0 N
X P1 1 -250 100 150 R 50 50 1 1 P
X P2 2 250 100 150 L 50 50 1 1 P
X P3 3 -250 0 150 R 50 50 1 1 P
X P4 4 250 0 150 L 50 50 1 1 P
X P5 5 -250 -100 150 R 50 50 1 1 P
X P6 6 250 -100 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# CONN_02X09
# CONN_02X07
#
DEF CONN_02X09 P 0 1 Y N 1 F N
F0 "P" 0 500 50 H V C CNN
F1 "CONN_02X09" 0 0 50 V V C CNN
DEF CONN_02X07 P 0 1 Y N 1 F N
F0 "P" 0 400 50 H V C CNN
F1 "CONN_02X07" 0 0 50 V V C CNN
F2 "" 0 -1200 50 H V C CNN
F3 "" 0 -1200 50 H V C CNN
$FPLIST
Pin_Header_Straight_2X09
Pin_Header_Angled_2X09
Socket_Strip_Straight_2X09
Socket_Strip_Angled_2X09
Pin_Header_Straight_2X07
Pin_Header_Angled_2X07
Socket_Strip_Straight_2X07
Socket_Strip_Angled_2X07
$ENDFPLIST
DRAW
S -100 -395 -50 -405 0 1 0 N
S -100 -295 -50 -305 0 1 0 N
S -100 -195 -50 -205 0 1 0 N
S -100 -95 -50 -105 0 1 0 N
@ -57,9 +80,7 @@ S -100 5 -50 -5 0 1 0 N
S -100 105 -50 95 0 1 0 N
S -100 205 -50 195 0 1 0 N
S -100 305 -50 295 0 1 0 N
S -100 405 -50 395 0 1 0 N
S -100 450 100 -450 0 1 0 N
S 50 -395 100 -405 0 1 0 N
S -100 350 100 -350 0 1 0 N
S 50 -295 100 -305 0 1 0 N
S 50 -195 100 -205 0 1 0 N
S 50 -95 100 -105 0 1 0 N
@ -67,63 +88,20 @@ S 50 5 100 -5 0 1 0 N
S 50 105 100 95 0 1 0 N
S 50 205 100 195 0 1 0 N
S 50 305 100 295 0 1 0 N
S 50 405 100 395 0 1 0 N
X P1 1 -250 400 150 R 50 50 1 1 P
X P2 2 250 400 150 L 50 50 1 1 P
X P3 3 -250 300 150 R 50 50 1 1 P
X P4 4 250 300 150 L 50 50 1 1 P
X P5 5 -250 200 150 R 50 50 1 1 P
X P6 6 250 200 150 L 50 50 1 1 P
X P7 7 -250 100 150 R 50 50 1 1 P
X P8 8 250 100 150 L 50 50 1 1 P
X P9 9 -250 0 150 R 50 50 1 1 P
X P10 10 250 0 150 L 50 50 1 1 P
X P11 11 -250 -100 150 R 50 50 1 1 P
X P12 12 250 -100 150 L 50 50 1 1 P
X P13 13 -250 -200 150 R 50 50 1 1 P
X P14 14 250 -200 150 L 50 50 1 1 P
X P15 15 -250 -300 150 R 50 50 1 1 P
X P16 16 250 -300 150 L 50 50 1 1 P
X P17 17 -250 -400 150 R 50 50 1 1 P
X P18 18 250 -400 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# FT232RL
#
DEF FT232RL U 0 40 Y Y 1 F N
F0 "U" -750 1200 60 H V C CNN
F1 "FT232RL" 0 0 60 H V C CNN
F2 "" 0 0 60 H I C CNN
F3 "" 0 0 60 H I C CNN
DRAW
S -800 1100 800 -1100 0 1 0 N
X TXD 1 1100 900 300 L 50 50 1 1 O
X nDTR 2 1100 300 300 L 50 50 1 1 O
X nRTS 3 1100 600 300 L 50 50 1 1 O
X VCCIO 4 -1100 900 300 R 50 50 1 1 W
X RXD 5 1100 750 300 L 50 50 1 1 I
X nRI 6 1100 -150 300 L 50 50 1 1 I
X GND 7 -150 -1400 300 U 50 50 1 1 W
X nDRS 9 1100 150 300 L 50 50 1 1 I
X nDCD 10 1100 0 300 L 50 50 1 1 I
X VCC 20 -1100 750 300 R 50 50 1 1 W
X nCTS 11 1100 450 300 L 50 50 1 1 I
X GND 21 150 -1400 300 U 50 50 1 1 W
X CBUS4 12 1100 -900 300 L 50 50 1 1 B
X CBUS1 22 1100 -450 300 L 50 50 1 1 B
X CBUS2 13 1100 -600 300 L 50 50 1 1 B
X CBUS0 23 1100 -300 300 L 50 50 1 1 B
X CBUS3 14 1100 -750 300 L 50 50 1 1 B
X USBDP 15 -1100 300 300 R 50 50 1 1 B
X AGND 25 -300 -1400 300 U 50 50 1 1 W
X USBDM 16 -1100 450 300 R 50 50 1 1 B
X TEST 26 300 -1400 300 U 50 50 1 1 I
X 3V3OUT 17 -1100 -900 300 R 50 50 1 1 w
X OSCI 27 -1100 -300 300 R 50 50 1 1 I
X GND 18 0 -1400 300 U 50 50 1 1 W
X OSCO 28 -1100 -450 300 R 50 50 1 1 O
X nRESET 19 -1100 0 300 R 50 50 1 1 I
X P1 1 -250 300 150 R 50 50 1 1 P
X P2 2 250 300 150 L 50 50 1 1 P
X P3 3 -250 200 150 R 50 50 1 1 P
X P4 4 250 200 150 L 50 50 1 1 P
X P5 5 -250 100 150 R 50 50 1 1 P
X P6 6 250 100 150 L 50 50 1 1 P
X P7 7 -250 0 150 R 50 50 1 1 P
X P8 8 250 0 150 L 50 50 1 1 P
X P9 9 -250 -100 150 R 50 50 1 1 P
X P10 10 250 -100 150 L 50 50 1 1 P
X P11 11 -250 -200 150 R 50 50 1 1 P
X P12 12 250 -200 150 L 50 50 1 1 P
X P13 13 -250 -300 150 R 50 50 1 1 P
X P14 14 250 -300 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#

239
pcbs/backplane/backplane.bak
View File

@ -30,6 +30,7 @@ LIBS:contrib
LIBS:valves
LIBS:silabs
LIBS:ft232rl
LIBS:ch340g
LIBS:backplane-cache
EELAYER 25 0
EELAYER END
@ -46,21 +47,10 @@ Comment3 ""
Comment4 ""
$EndDescr
$Comp
L CONN_02X04 P1
U 1 1 5948E65F
P 2100 2400
F 0 "P1" H 2100 2650 50 0000 C CNN
F 1 "CONN_02X04" H 2100 2150 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x04" H 2100 1200 50 0001 C CNN
F 3 "" H 2100 1200 50 0000 C CNN
1 2100 2400
1 0 0 -1
$EndComp
$Comp
L USB_B P4
L USB_B P3
U 1 1 5948EBA5
P 7200 4300
F 0 "P4" H 7400 4100 50 0000 C CNN
F 0 "P3" H 7400 4100 50 0000 C CNN
F 1 "USB_B" H 7150 4500 50 0000 C CNN
F 2 "MyUSB:USB3145-30-1-A" V 7150 4200 50 0001 C CNN
F 3 "http://www.farnell.com/datasheets/1841848.pdf" V 7150 4200 50 0001 C CNN
@ -68,152 +58,139 @@ F 4 "2443141" H 7200 4300 60 0001 C CNN "Farnell"
1 7200 4300
-1 0 0 1
$EndComp
$Comp
L CONN_02X09 P3
U 1 1 5948FBD0
P 7500 2500
F 0 "P3" H 7500 3000 50 0000 C CNN
F 1 "CONN_02X09" V 7500 2500 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x09" H 7500 1300 50 0001 C CNN
F 3 "" H 7500 1300 50 0000 C CNN
1 7500 2500
1 0 0 -1
$EndComp
Text GLabel 1850 2250 0 60 UnSpc ~ 0
Vcc
5V
Text GLabel 1850 2350 0 60 UnSpc ~ 0
ADC1
Text GLabel 1850 2450 0 60 UnSpc ~ 0
ADC2
Text GLabel 1850 2550 0 60 UnSpc ~ 0
Text GLabel 2350 2350 2 60 UnSpc ~ 0
ADC3
Text GLabel 2350 2250 2 60 UnSpc ~ 0
GND
Text GLabel 2350 2350 2 60 UnSpc ~ 0
GND
$Comp
L CONN_02X03 P?
U 1 1 594F86D2
P 2100 2350
F 0 "P?" H 2100 2550 50 0000 C CNN
F 1 "CONN_02X03" H 2100 2150 50 0001 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x03" H 2100 1150 50 0001 C CNN
F 3 "" H 2100 1150 50 0000 C CNN
1 2100 2350
1 0 0 -1
$EndComp
Text GLabel 2350 2450 2 60 UnSpc ~ 0
DAC1
Text GLabel 2350 2550 2 60 UnSpc ~ 0
DAC2
Text GLabel 7250 2100 0 60 UnSpc ~ 0
VCC
Text GLabel 7250 2200 0 60 UnSpc ~ 0
ADC4
$Comp
L CH340G U?
U 1 1 594FA4BA
P 5150 4200
F 0 "U?" H 5150 3700 60 0000 C CNN
F 1 "CH340G" H 5150 4700 60 0000 C CNN
F 2 "SMD_Packages:SO-16-N" H 5350 3550 60 0001 C CNN
F 3 "http://cdn2.boxtec.ch/pub/diverse/ch340g-datasheet.pdf" H 5350 3550 60 0001 C CNN
1 5150 4200
1 0 0 -1
$EndComp
Text GLabel 9050 2000 0 60 UnSpc ~ 0
5V
Text GLabel 9050 2100 0 60 UnSpc ~ 0
GND
Text GLabel 7250 2300 0 60 UnSpc ~ 0
SPI_CLK
Text GLabel 7250 2400 0 60 UnSpc ~ 0
SPI_MISO
Text GLabel 7250 2500 0 60 UnSpc ~ 0
SPI_MOSI
Text GLabel 7250 2600 0 60 UnSpc ~ 0
SPI_CS
Text GLabel 7250 2700 0 60 UnSpc ~ 0
Text GLabel 9050 2200 0 60 UnSpc ~ 0
I2C_SCL
Text GLabel 7250 2800 0 60 UnSpc ~ 0
Text GLabel 9050 2300 0 60 UnSpc ~ 0
I2C_SDA
Text GLabel 7250 2900 0 60 UnSpc ~ 0
Text GLabel 9050 2400 0 60 UnSpc ~ 0
UART_TX
Text GLabel 9050 2600 0 60 UnSpc ~ 0
DAC1
Text GLabel 9550 2600 2 60 UnSpc ~ 0
DAC2
Text GLabel 9550 2300 2 60 UnSpc ~ 0
GPIO3
Text GLabel 9550 2400 2 60 UnSpc ~ 0
GPIO4
Text GLabel 9050 2500 0 60 UnSpc ~ 0
UART_RX
Text GLabel 9550 2200 2 60 UnSpc ~ 0
GPIO2
Text GLabel 9550 2100 2 60 UnSpc ~ 0
GPIO1
Text GLabel 9550 2000 2 60 UnSpc ~ 0
GPIO0
Text GLabel 9550 2500 2 60 UnSpc ~ 0
nRST
$Comp
L FT232RL U?
U 1 1 59490896
P 5150 4050
F 0 "U?" H 4400 5250 60 0000 C CNN
F 1 "FT232RL" H 5150 4050 60 0000 C CNN
F 2 "Housings_SSOP:SSOP-28_5.3x10.2mm_Pitch0.65mm" H 5150 4050 60 0001 C CNN
F 3 "" H 5150 4050 60 0001 C CNN
1 5150 4050
L CONN_02X07 P?
U 1 1 594FADC8
P 9300 2300
F 0 "P?" H 9300 2700 50 0000 C CNN
F 1 "CONN_02X07" V 9300 2300 50 0001 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x07" H 9300 1100 50 0001 C CNN
F 3 "" H 9300 1100 50 0000 C CNN
1 9300 2300
1 0 0 -1
$EndComp
Text GLabel 7750 2100 2 60 UnSpc ~ 0
PWM1
Text GLabel 7750 2200 2 60 UnSpc ~ 0
PWM2
Text GLabel 7750 2300 2 60 UnSpc ~ 0
Text GLabel 9050 3000 0 60 UnSpc ~ 0
5V
Text GLabel 9050 3100 0 60 UnSpc ~ 0
GND
Text GLabel 9050 3200 0 60 UnSpc ~ 0
I2C_SCL
Text GLabel 9050 3300 0 60 UnSpc ~ 0
I2C_SDA
Text GLabel 9050 3400 0 60 UnSpc ~ 0
UART_TX
Text GLabel 9050 3600 0 60 UnSpc ~ 0
DAC1
Text GLabel 7750 2400 2 60 UnSpc ~ 0
Text GLabel 9550 3600 2 60 UnSpc ~ 0
DAC2
Text GLabel 7750 2500 2 60 UnSpc ~ 0
GPIO1
Text GLabel 7750 2600 2 60 UnSpc ~ 0
GPIO2
Text GLabel 7750 2700 2 60 UnSpc ~ 0
Text GLabel 9550 3300 2 60 UnSpc ~ 0
GPIO3
Text GLabel 7750 2800 2 60 UnSpc ~ 0
Text GLabel 9550 3400 2 60 UnSpc ~ 0
GPIO4
Text GLabel 7750 2900 2 60 UnSpc ~ 0
UART_TX
Text GLabel 9050 3500 0 60 UnSpc ~ 0
UART_RX
Text GLabel 9550 3200 2 60 UnSpc ~ 0
GPIO2
Text GLabel 9550 3100 2 60 UnSpc ~ 0
GPIO1
Text GLabel 9550 3000 2 60 UnSpc ~ 0
GPIO0
Text GLabel 9550 3500 2 60 UnSpc ~ 0
nRST
$Comp
L CONN_02X04 P?
U 1 1 59490E80
P 2100 3250
F 0 "P?" H 2100 3500 50 0000 C CNN
F 1 "CONN_02X04" H 2100 3000 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x04" H 2100 2050 50 0001 C CNN
F 3 "" H 2100 2050 50 0000 C CNN
1 2100 3250
L CONN_02X07 P?
U 1 1 594FAEEA
P 9300 3300
F 0 "P?" H 9300 3700 50 0000 C CNN
F 1 "CONN_02X07" V 9300 3300 50 0001 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x07" H 9300 2100 50 0001 C CNN
F 3 "" H 9300 2100 50 0000 C CNN
1 9300 3300
1 0 0 -1
$EndComp
Text GLabel 1850 3100 0 60 UnSpc ~ 0
Vcc
Text GLabel 1850 3200 0 60 UnSpc ~ 0
Text GLabel 1850 2900 0 60 UnSpc ~ 0
5V
Text GLabel 1850 3000 0 60 UnSpc ~ 0
ADC1
Text GLabel 1850 3300 0 60 UnSpc ~ 0
Text GLabel 1850 3100 0 60 UnSpc ~ 0
ADC2
Text GLabel 1850 3400 0 60 UnSpc ~ 0
Text GLabel 2350 3000 2 60 UnSpc ~ 0
ADC3
Text GLabel 2350 3100 2 60 UnSpc ~ 0
Text GLabel 2350 2900 2 60 UnSpc ~ 0
GND
Text GLabel 2350 3200 2 60 UnSpc ~ 0
GND
Text GLabel 2350 3300 2 60 UnSpc ~ 0
DAC1
Text GLabel 2350 3400 2 60 UnSpc ~ 0
DAC2
$Comp
L CONN_02X09 P?
U 1 1 59490EE5
P 9650 2500
F 0 "P?" H 9650 3000 50 0000 C CNN
F 1 "CONN_02X09" V 9650 2500 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x09" H 9650 1300 50 0001 C CNN
F 3 "" H 9650 1300 50 0000 C CNN
1 9650 2500
L CONN_02X03 P?
U 1 1 594FAFF9
P 2100 3000
F 0 "P?" H 2100 3200 50 0000 C CNN
F 1 "CONN_02X03" H 2100 2800 50 0001 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x03" H 2100 1800 50 0001 C CNN
F 3 "" H 2100 1800 50 0000 C CNN
1 2100 3000
1 0 0 -1
$EndComp
Text GLabel 9400 2100 0 60 UnSpc ~ 0
VCC
Text GLabel 9400 2200 0 60 UnSpc ~ 0
GND
Text GLabel 9400 2300 0 60 UnSpc ~ 0
SPI_CLK
Text GLabel 9400 2400 0 60 UnSpc ~ 0
SPI_MISO
Text GLabel 9400 2500 0 60 UnSpc ~ 0
SPI_MOSI
Text GLabel 9400 2600 0 60 UnSpc ~ 0
SPI_CS
Text GLabel 9400 2700 0 60 UnSpc ~ 0
I2C_SCL
Text GLabel 9400 2800 0 60 UnSpc ~ 0
I2C_SDA
Text GLabel 9400 2900 0 60 UnSpc ~ 0
UART_TX
Text GLabel 9900 2100 2 60 UnSpc ~ 0
PWM1
Text GLabel 9900 2200 2 60 UnSpc ~ 0
PWM2
Text GLabel 9900 2300 2 60 UnSpc ~ 0
DAC1
Text GLabel 9900 2400 2 60 UnSpc ~ 0
DAC2
Text GLabel 9900 2500 2 60 UnSpc ~ 0
GPIO1
Text GLabel 9900 2600 2 60 UnSpc ~ 0
GPIO2
Text GLabel 9900 2700 2 60 UnSpc ~ 0
GPIO3
Text GLabel 9900 2800 2 60 UnSpc ~ 0
GPIO4
Text GLabel 9900 2900 2 60 UnSpc ~ 0
UART_TX
Text GLabel 2350 3100 2 60 UnSpc ~ 0
ADC4
$EndSCHEMATC

359
pcbs/backplane/backplane.net
View File

@ -1,7 +1,7 @@
(export (version D)
(design
(source /home/maximilian/UppSense/pcbs/backplane/backplane.sch)
(date "tis 20 jun 2017 12:32:15")
(date "sön 25 jun 2017 14:14:59")
(tool "Eeschema 4.0.5+dfsg1-4")
(sheet (number 1) (name /) (tstamps /)
(title_block
@ -15,12 +15,6 @@
(comment (number 3) (value ""))
(comment (number 4) (value "")))))
(components
(comp (ref P1)
(value CONN_02X04)
(footprint Pin_Headers:Pin_Header_Straight_2x04)
(libsource (lib conn) (part CONN_02X04))
(sheetpath (names /) (tstamps /))
(tstamp 5948E65F))
(comp (ref P3)
(value USB_B)
(footprint MyUSB:USB3145-30-1-A)
@ -30,60 +24,86 @@
(libsource (lib conn) (part USB_B))
(sheetpath (names /) (tstamps /))
(tstamp 5948EBA5))
(comp (ref P4)
(value CONN_02X09)
(footprint Pin_Headers:Pin_Header_Straight_2x09)
(libsource (lib conn) (part CONN_02X09))
(comp (ref P1)
(value CONN_02X03)
(footprint Pin_Headers:Pin_Header_Straight_2x03)
(libsource (lib conn) (part CONN_02X03))
(sheetpath (names /) (tstamps /))
(tstamp 5948FBD0))
(tstamp 594F86D2))
(comp (ref U1)
(value FT232RL)
(footprint Housings_SSOP:SSOP-28_5.3x10.2mm_Pitch0.65mm)
(libsource (lib ft232rl) (part FT232RL))
(value CH340G)
(footprint SMD_Packages:SO-16-N)
(datasheet http://cdn2.boxtec.ch/pub/diverse/ch340g-datasheet.pdf)
(libsource (lib ch340g) (part CH340G))
(sheetpath (names /) (tstamps /))
(tstamp 59490896))
(comp (ref P2)
(value CONN_02X04)
(footprint Pin_Headers:Pin_Header_Straight_2x04)
(libsource (lib conn) (part CONN_02X04))
(tstamp 594FA4BA))
(comp (ref P4)
(value CONN_02X07)
(footprint Pin_Headers:Pin_Header_Straight_2x07)
(libsource (lib conn) (part CONN_02X07))
(sheetpath (names /) (tstamps /))
(tstamp 59490E80))
(tstamp 594FADC8))
(comp (ref P5)
(value CONN_02X09)
(footprint Pin_Headers:Pin_Header_Straight_2x09)
(libsource (lib conn) (part CONN_02X09))
(value CONN_02X07)
(footprint Pin_Headers:Pin_Header_Straight_2x07)
(libsource (lib conn) (part CONN_02X07))
(sheetpath (names /) (tstamps /))
(tstamp 594FAEEA))
(comp (ref P2)
(value CONN_02X03)
(footprint Pin_Headers:Pin_Header_Straight_2x03)
(libsource (lib conn) (part CONN_02X03))
(sheetpath (names /) (tstamps /))
(tstamp 59490EE5)))
(tstamp 594FAFF9)))
(libparts
(libpart (lib conn) (part CONN_02X04)
(description "Connector, double row, 02x04")
(libpart (lib ch340g) (part CH340G)
(fields
(field (name Reference) U)
(field (name Value) CH340G))
(pins
(pin (num 1) (name GND) (type passive))
(pin (num 2) (name TXD) (type output))
(pin (num 3) (name RXD) (type input))
(pin (num 4) (name V3) (type passive))
(pin (num 5) (name UD+) (type BiDi))
(pin (num 6) (name UD-) (type BiDi))
(pin (num 7) (name XI) (type input))
(pin (num 8) (name XO) (type output))
(pin (num 9) (name CTS) (type input))
(pin (num 10) (name DSR) (type input))
(pin (num 11) (name RI) (type input))
(pin (num 12) (name DCD) (type input))
(pin (num 13) (name DTR) (type output))
(pin (num 14) (name RTS) (type output))
(pin (num 15) (name R232) (type input))
(pin (num 16) (name VCC) (type passive))))
(libpart (lib conn) (part CONN_02X03)
(description "Connector, double row, 02x03")
(footprints
(fp Pin_Header_Straight_2X04)
(fp Pin_Header_Angled_2X04)
(fp Socket_Strip_Straight_2X04)
(fp Socket_Strip_Angled_2X04))
(fp Pin_Header_Straight_2X03)
(fp Pin_Header_Angled_2X03)
(fp Socket_Strip_Straight_2X03)
(fp Socket_Strip_Angled_2X03))
(fields
(field (name Reference) P)
(field (name Value) CONN_02X04))
(field (name Value) CONN_02X03))
(pins
(pin (num 1) (name P1) (type passive))
(pin (num 2) (name P2) (type passive))
(pin (num 3) (name P3) (type passive))
(pin (num 4) (name P4) (type passive))
(pin (num 5) (name P5) (type passive))
(pin (num 6) (name P6) (type passive))
(pin (num 7) (name P7) (type passive))
(pin (num 8) (name P8) (type passive))))
(libpart (lib conn) (part CONN_02X09)
(description "Connector, double row, 02x09")
(pin (num 6) (name P6) (type passive))))
(libpart (lib conn) (part CONN_02X07)
(description "Connector, double row, 02x07")
(footprints
(fp Pin_Header_Straight_2X09)
(fp Pin_Header_Angled_2X09)
(fp Socket_Strip_Straight_2X09)
(fp Socket_Strip_Angled_2X09))
(fp Pin_Header_Straight_2X07)
(fp Pin_Header_Angled_2X07)
(fp Socket_Strip_Straight_2X07)
(fp Socket_Strip_Angled_2X07))
(fields
(field (name Reference) P)
(field (name Value) CONN_02X09))
(field (name Value) CONN_02X07))
(pins
(pin (num 1) (name P1) (type passive))
(pin (num 2) (name P2) (type passive))
@ -98,42 +118,7 @@
(pin (num 11) (name P11) (type passive))
(pin (num 12) (name P12) (type passive))
(pin (num 13) (name P13) (type passive))
(pin (num 14) (name P14) (type passive))
(pin (num 15) (name P15) (type passive))
(pin (num 16) (name P16) (type passive))
(pin (num 17) (name P17) (type passive))
(pin (num 18) (name P18) (type passive))))
(libpart (lib ft232rl) (part FT232RL)
(fields
(field (name Reference) U)
(field (name Value) FT232RL))
(pins
(pin (num 1) (name TXD) (type output))
(pin (num 2) (name nDTR) (type output))
(pin (num 3) (name nRTS) (type output))
(pin (num 4) (name VCCIO) (type power_in))
(pin (num 5) (name RXD) (type input))
(pin (num 6) (name nRI) (type input))
(pin (num 7) (name GND) (type power_in))
(pin (num 9) (name nDRS) (type input))
(pin (num 10) (name nDCD) (type input))
(pin (num 11) (name nCTS) (type input))
(pin (num 12) (name CBUS4) (type BiDi))
(pin (num 13) (name CBUS2) (type BiDi))
(pin (num 14) (name CBUS3) (type BiDi))
(pin (num 15) (name USBDP) (type BiDi))
(pin (num 16) (name USBDM) (type BiDi))
(pin (num 17) (name 3V3OUT) (type power_out))
(pin (num 18) (name GND) (type power_in))
(pin (num 19) (name nRESET) (type input))
(pin (num 20) (name VCC) (type power_in))
(pin (num 21) (name GND) (type power_in))
(pin (num 22) (name CBUS1) (type BiDi))
(pin (num 23) (name CBUS0) (type BiDi))
(pin (num 25) (name AGND) (type power_in))
(pin (num 26) (name TEST) (type input))
(pin (num 27) (name OSCI) (type input))
(pin (num 28) (name OSCO) (type output))))
(pin (num 14) (name P14) (type passive))))
(libpart (lib conn) (part USB_B)
(description "USB Type B connector")
(footprints
@ -150,140 +135,106 @@
(libraries
(library (logical conn)
(uri /usr/share/kicad/library/conn.lib))
(library (logical ft232rl)
(uri /home/maximilian/UppSense/pcbs/backplane/myLibs/ft232rl.lib)))
(library (logical ch340g)
(uri /home/maximilian/UppSense/pcbs/backplane/myLibs/ch340g.lib)))
(nets
(net (code 1) (name ADC1)
(node (ref P2) (pin 3))
(node (ref P1) (pin 3)))
(net (code 2) (name ADC2)
(net (code 1) (name 5V)
(node (ref P5) (pin 1))
(node (ref P2) (pin 1))
(node (ref P1) (pin 1))
(node (ref P4) (pin 1)))
(net (code 2) (name GPIO0)
(node (ref P5) (pin 2))
(node (ref P4) (pin 2)))
(net (code 3) (name DAC2)
(node (ref P4) (pin 14))
(node (ref P5) (pin 14)))
(net (code 4) (name ADC4)
(node (ref P2) (pin 6))
(node (ref P1) (pin 6)))
(net (code 5) (name ADC2)
(node (ref P2) (pin 5))
(node (ref P1) (pin 5)))
(net (code 3) (name DAC1)
(node (ref P5) (pin 6))
(node (ref P4) (pin 6))
(node (ref P1) (pin 6))
(node (ref P2) (pin 6)))
(net (code 4) (name ADC3)
(node (ref P1) (pin 7))
(node (ref P2) (pin 7)))
(net (code 5) (name DAC2)
(node (ref P1) (pin 8))
(node (ref P5) (pin 8))
(node (ref P2) (pin 8))
(node (ref P4) (pin 8)))
(net (code 6) (name GND)
(node (ref P1) (pin 2))
(net (code 6) (name ADC3)
(node (ref P1) (pin 4))
(node (ref P4) (pin 3))
(node (ref P2) (pin 4))
(node (ref P2) (pin 2))
(node (ref P5) (pin 3)))
(net (code 7) (name "Net-(U1-Pad26)")
(node (ref U1) (pin 26)))
(net (code 8) (name "Net-(U1-Pad17)")
(node (ref U1) (pin 17)))
(net (code 9) (name "Net-(U1-Pad27)")
(node (ref U1) (pin 27)))
(net (code 10) (name "Net-(U1-Pad18)")
(node (ref U1) (pin 18)))
(net (code 11) (name "Net-(U1-Pad28)")
(node (ref U1) (pin 28)))
(net (code 12) (name "Net-(U1-Pad19)")
(node (ref U1) (pin 19)))
(net (code 13) (name VCC)
(node (ref P4) (pin 1))
(node (ref P5) (pin 1))
(node (ref P1) (pin 1))
(node (ref P2) (pin 1)))
(net (code 14) (name SPI_CLK)
(node (ref P5) (pin 5))
(node (ref P4) (pin 5)))
(net (code 15) (name SPI_MISO)
(node (ref P4) (pin 7))
(node (ref P5) (pin 7)))
(net (code 16) (name SPI_MOSI)
(node (ref P5) (pin 9))
(node (ref P4) (pin 9)))
(net (code 17) (name SPI_CS)
(node (ref P5) (pin 11))
(node (ref P4) (pin 11)))
(net (code 18) (name "Net-(U1-Pad16)")
(node (ref U1) (pin 16)))
(net (code 19) (name I2C_SCL)
(node (ref P2) (pin 4)))
(net (code 7) (name ADC1)
(node (ref P1) (pin 3))
(node (ref P2) (pin 3)))
(net (code 8) (name DAC1)
(node (ref P5) (pin 13))
(node (ref P4) (pin 13)))
(net (code 20) (name I2C_SDA)
(node (ref P5) (pin 15))
(node (ref P4) (pin 15)))
(net (code 21) (name GPIO3)
(node (ref P5) (pin 14))
(node (ref P4) (pin 14)))
(net (code 22) (name GPIO1)
(node (ref P4) (pin 10))
(node (ref P5) (pin 10)))
(net (code 23) (name GPIO2)
(node (ref P4) (pin 12))
(node (ref P5) (pin 12)))
(net (code 24) (name GPIO4)
(node (ref P5) (pin 16))
(node (ref P4) (pin 16)))
(net (code 25) (name UART_TX)
(node (ref P5) (pin 18))
(node (ref P5) (pin 17))
(node (ref P4) (pin 17))
(node (ref P4) (pin 18)))
(net (code 26) (name "Net-(P3-Pad2)")
(node (ref P3) (pin 2)))
(net (code 27) (name "Net-(P3-Pad1)")
(node (ref P3) (pin 1)))
(net (code 28) (name "Net-(P3-Pad3)")
(node (ref P3) (pin 3)))
(net (code 29) (name "Net-(P3-Pad4)")
(node (ref P3) (pin 4)))
(net (code 30) (name "Net-(P3-Pad5)")
(node (ref P3) (pin 5)))
(net (code 31) (name PWM1)
(node (ref P5) (pin 2))
(node (ref P4) (pin 2)))
(net (code 32) (name PWM2)
(net (code 9) (name nRST)
(node (ref P5) (pin 12))
(node (ref P4) (pin 12)))
(net (code 10) (name UART_RX)
(node (ref P5) (pin 11))
(node (ref P4) (pin 11)))
(net (code 11) (name GPIO4)
(node (ref P5) (pin 10))
(node (ref P4) (pin 10)))
(net (code 12) (name UART_TX)
(node (ref P4) (pin 9))
(node (ref P5) (pin 9)))
(net (code 13) (name GPIO3)
(node (ref P4) (pin 8))
(node (ref P5) (pin 8)))
(net (code 14) (name I2C_SDA)
(node (ref P4) (pin 7))
(node (ref P5) (pin 7)))
(net (code 15) (name GPIO2)
(node (ref P5) (pin 6))
(node (ref P4) (pin 6)))
(net (code 16) (name I2C_SCL)
(node (ref P5) (pin 5))
(node (ref P4) (pin 5)))
(net (code 17) (name GPIO1)
(node (ref P4) (pin 4))
(node (ref P5) (pin 4)))
(net (code 33) (name "Net-(U1-Pad21)")
(node (ref U1) (pin 21)))
(net (code 34) (name "Net-(U1-Pad4)")
(node (ref U1) (pin 4)))
(net (code 35) (name "Net-(U1-Pad5)")
(node (ref U1) (pin 5)))
(net (code 36) (name "Net-(U1-Pad6)")
(node (ref U1) (pin 6)))
(net (code 37) (name "Net-(U1-Pad7)")
(net (code 18) (name GND)
(node (ref P5) (pin 3))
(node (ref P4) (pin 3))
(node (ref P2) (pin 2))
(node (ref P1) (pin 2)))
(net (code 19) (name "Net-(U1-Pad8)")
(node (ref U1) (pin 8)))
(net (code 20) (name "Net-(U1-Pad7)")
(node (ref U1) (pin 7)))
(net (code 38) (name "Net-(U1-Pad9)")
(node (ref U1) (pin 9)))
(net (code 39) (name "Net-(U1-Pad10)")
(node (ref U1) (pin 10)))
(net (code 40) (name "Net-(U1-Pad20)")
(node (ref U1) (pin 20)))
(net (code 41) (name "Net-(U1-Pad11)")
(node (ref U1) (pin 11)))
(net (code 42) (name "Net-(U1-Pad3)")
(net (code 21) (name "Net-(U1-Pad6)")
(node (ref U1) (pin 6)))
(net (code 22) (name "Net-(U1-Pad5)")
(node (ref U1) (pin 5)))
(net (code 23) (name "Net-(U1-Pad4)")
(node (ref U1) (pin 4)))
(net (code 24) (name "Net-(U1-Pad3)")
(node (ref U1) (pin 3)))
(net (code 43) (name "Net-(U1-Pad12)")
(node (ref U1) (pin 12)))
(net (code 44) (name "Net-(U1-Pad22)")
(node (ref U1) (pin 22)))
(net (code 45) (name "Net-(U1-Pad13)")
(node (ref U1) (pin 13)))
(net (code 46) (name "Net-(U1-Pad23)")
(node (ref U1) (pin 23)))
(net (code 47) (name "Net-(U1-Pad14)")
(node (ref U1) (pin 14)))
(net (code 48) (name "Net-(U1-Pad15)")
(node (ref U1) (pin 15)))
(net (code 49) (name "Net-(U1-Pad25)")
(node (ref U1) (pin 25)))
(net (code 50) (name "Net-(U1-Pad2)")
(net (code 25) (name "Net-(U1-Pad2)")
(node (ref U1) (pin 2)))
(net (code 51) (name "Net-(U1-Pad1)")
(node (ref U1) (pin 1)))))
(net (code 26) (name "Net-(U1-Pad1)")
(node (ref U1) (pin 1)))
(net (code 27) (name "Net-(U1-Pad9)")
(node (ref U1) (pin 9)))
(net (code 28) (name "Net-(P3-Pad5)")
(node (ref P3) (pin 5)))
(net (code 29) (name "Net-(P3-Pad4)")
(node (ref P3) (pin 4)))
(net (code 30) (name "Net-(P3-Pad3)")
(node (ref P3) (pin 3)))
(net (code 31) (name "Net-(P3-Pad2)")
(node (ref P3) (pin 2)))
(net (code 32) (name "Net-(P3-Pad1)")
(node (ref P3) (pin 1)))
(net (code 33) (name "Net-(U1-Pad16)")
(node (ref U1) (pin 16)))
(net (code 34) (name "Net-(U1-Pad15)")
(node (ref U1) (pin 15)))
(net (code 35) (name "Net-(U1-Pad14)")
(node (ref U1) (pin 14)))
(net (code 36) (name "Net-(U1-Pad13)")
(node (ref U1) (pin 13)))
(net (code 37) (name "Net-(U1-Pad12)")
(node (ref U1) (pin 12)))
(net (code 38) (name "Net-(U1-Pad11)")
(node (ref U1) (pin 11)))
(net (code 39) (name "Net-(U1-Pad10)")
(node (ref U1) (pin 10)))))

23
pcbs/backplane/backplane.pro
View File

@ -1,4 +1,4 @@
update=tis 20 jun 2017 12:51:57
update=sön 25 jun 2017 13:55:20
version=1
last_client=kicad
[pcbnew]
@ -25,6 +25,16 @@ version=1
NetIExt=net
[general]
version=1
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=Pcbnew
SpiceForceRefPrefix=0
SpiceUseNetNumbers=0
LabSize=60
[eeschema]
version=1
LibDir=
@ -60,13 +70,4 @@ LibName28=contrib
LibName29=valves
LibName30=myLibs/silabs
LibName31=myLibs/ft232rl
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=Pcbnew
SpiceForceRefPrefix=0
SpiceUseNetNumbers=0
LabSize=60
LibName32=myLibs/ch340g

235
pcbs/backplane/backplane.sch
View File

@ -30,6 +30,7 @@ LIBS:contrib
LIBS:valves
LIBS:silabs
LIBS:ft232rl
LIBS:ch340g
LIBS:backplane-cache
EELAYER 25 0
EELAYER END
@ -46,17 +47,6 @@ Comment3 ""
Comment4 ""
$EndDescr
$Comp
L CONN_02X04 P1
U 1 1 5948E65F
P 2100 2400
F 0 "P1" H 2100 2650 50 0000 C CNN
F 1 "CONN_02X04" H 2100 2150 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x04" H 2100 1200 50 0001 C CNN
F 3 "" H 2100 1200 50 0000 C CNN
1 2100 2400
1 0 0 -1
$EndComp
$Comp
L USB_B P3
U 1 1 5948EBA5
P 7200 4300
@ -68,152 +58,139 @@ F 4 "2443141" H 7200 4300 60 0001 C CNN "Farnell"
1 7200 4300
-1 0 0 1
$EndComp
$Comp
L CONN_02X09 P4
U 1 1 5948FBD0
P 7500 2500
F 0 "P4" H 7500 3000 50 0000 C CNN
F 1 "CONN_02X09" V 7500 2500 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x09" H 7500 1300 50 0001 C CNN
F 3 "" H 7500 1300 50 0000 C CNN
1 7500 2500
1 0 0 -1
$EndComp
Text GLabel 1850 2250 0 60 UnSpc ~ 0
Vcc
5V
Text GLabel 1850 2350 0 60 UnSpc ~ 0
ADC1
Text GLabel 1850 2450 0 60 UnSpc ~ 0
ADC2
Text GLabel 1850 2550 0 60 UnSpc ~ 0
Text GLabel 2350 2350 2 60 UnSpc ~ 0
ADC3
Text GLabel 2350 2250 2 60 UnSpc ~ 0
GND
Text GLabel 2350 2350 2 60 UnSpc ~ 0
GND
$Comp
L CONN_02X03 P1
U 1 1 594F86D2
P 2100 2350
F 0 "P1" H 2100 2550 50 0000 C CNN
F 1 "CONN_02X03" H 2100 2150 50 0001 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x03" H 2100 1150 50 0001 C CNN
F 3 "" H 2100 1150 50 0000 C CNN
1 2100 2350
1 0 0 -1
$EndComp
Text GLabel 2350 2450 2 60 UnSpc ~ 0
DAC1
Text GLabel 2350 2550 2 60 UnSpc ~ 0
DAC2
Text GLabel 7250 2100 0 60 UnSpc ~ 0
VCC
Text GLabel 7250 2200 0 60 UnSpc ~ 0
ADC4
$Comp
L CH340G U1
U 1 1 594FA4BA
P 5150 4200
F 0 "U1" H 5150 3700 60 0000 C CNN
F 1 "CH340G" H 5150 4700 60 0000 C CNN
F 2 "SMD_Packages:SO-16-N" H 5350 3550 60 0001 C CNN
F 3 "http://cdn2.boxtec.ch/pub/diverse/ch340g-datasheet.pdf" H 5350 3550 60 0001 C CNN
1 5150 4200
1 0 0 -1
$EndComp
Text GLabel 9050 2000 0 60 UnSpc ~ 0
5V
Text GLabel 9050 2100 0 60 UnSpc ~ 0
GND
Text GLabel 7250 2300 0 60 UnSpc ~ 0
SPI_CLK
Text GLabel 7250 2400 0 60 UnSpc ~ 0
SPI_MISO
Text GLabel 7250 2500 0 60 UnSpc ~ 0
SPI_MOSI
Text GLabel 7250 2600 0 60 UnSpc ~ 0
SPI_CS
Text GLabel 7250 2700 0 60 UnSpc ~ 0
Text GLabel 9050 2200 0 60 UnSpc ~ 0
I2C_SCL
Text GLabel 7250 2800 0 60 UnSpc ~ 0
Text GLabel 9050 2300 0 60 UnSpc ~ 0
I2C_SDA
Text GLabel 7250 2900 0 60 UnSpc ~ 0
Text GLabel 9050 2400 0 60 UnSpc ~ 0
UART_TX
Text GLabel 9050 2600 0 60 UnSpc ~ 0
DAC1
Text GLabel 9550 2600 2 60 UnSpc ~ 0
DAC2
Text GLabel 9550 2300 2 60 UnSpc ~ 0
GPIO3
Text GLabel 9550 2400 2 60 UnSpc ~ 0
GPIO4
Text GLabel 9050 2500 0 60 UnSpc ~ 0
UART_RX
Text GLabel 9550 2200 2 60 UnSpc ~ 0
GPIO2
Text GLabel 9550 2100 2 60 UnSpc ~ 0
GPIO1
Text GLabel 9550 2000 2 60 UnSpc ~ 0
GPIO0
Text GLabel 9550 2500 2 60 UnSpc ~ 0
nRST
$Comp
L FT232RL U1
U 1 1 59490896
P 5150 4050
F 0 "U1" H 4400 5250 60 0000 C CNN
F 1 "FT232RL" H 5150 4050 60 0000 C CNN
F 2 "Housings_SSOP:SSOP-28_5.3x10.2mm_Pitch0.65mm" H 5150 4050 60 0001 C CNN
F 3 "" H 5150 4050 60 0001 C CNN
1 5150 4050
L CONN_02X07 P4
U 1 1 594FADC8
P 9300 2300
F 0 "P4" H 9300 2700 50 0000 C CNN
F 1 "CONN_02X07" V 9300 2300 50 0001 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x07" H 9300 1100 50 0001 C CNN
F 3 "" H 9300 1100 50 0000 C CNN
1 9300 2300
1 0 0 -1
$EndComp
Text GLabel 7750 2100 2 60 UnSpc ~ 0
PWM1
Text GLabel 7750 2200 2 60 UnSpc ~ 0
PWM2
Text GLabel 7750 2300 2 60 UnSpc ~ 0
Text GLabel 9050 3000 0 60 UnSpc ~ 0
5V
Text GLabel 9050 3100 0 60 UnSpc ~ 0
GND
Text GLabel 9050 3200 0 60 UnSpc ~ 0
I2C_SCL
Text GLabel 9050 3300 0 60 UnSpc ~ 0
I2C_SDA
Text GLabel 9050 3400 0 60 UnSpc ~ 0
UART_TX
Text GLabel 9050 3600 0 60 UnSpc ~ 0
DAC1
Text GLabel 7750 2400 2 60 UnSpc ~ 0
Text GLabel 9550 3600 2 60 UnSpc ~ 0
DAC2
Text GLabel 7750 2500 2 60 UnSpc ~ 0
GPIO1
Text GLabel 7750 2600 2 60 UnSpc ~ 0
GPIO2
Text GLabel 7750 2700 2 60 UnSpc ~ 0
Text GLabel 9550 3300 2 60 UnSpc ~ 0
GPIO3
Text GLabel 7750 2800 2 60 UnSpc ~ 0
Text GLabel 9550 3400 2 60 UnSpc ~ 0
GPIO4
Text GLabel 7750 2900 2 60 UnSpc ~ 0
UART_TX
Text GLabel 9050 3500 0 60 UnSpc ~ 0
UART_RX
Text GLabel 9550 3200 2 60 UnSpc ~ 0
GPIO2
Text GLabel 9550 3100 2 60 UnSpc ~ 0
GPIO1
Text GLabel 9550 3000 2 60 UnSpc ~ 0
GPIO0
Text GLabel 9550 3500 2 60 UnSpc ~ 0
nRST
$Comp
L CONN_02X04 P2
U 1 1 59490E80
P 2100 3250
F 0 "P2" H 2100 3500 50 0000 C CNN
F 1 "CONN_02X04" H 2100 3000 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x04" H 2100 2050 50 0001 C CNN
F 3 "" H 2100 2050 50 0000 C CNN
1 2100 3250
L CONN_02X07 P5
U 1 1 594FAEEA
P 9300 3300
F 0 "P5" H 9300 3700 50 0000 C CNN
F 1 "CONN_02X07" V 9300 3300 50 0001 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x07" H 9300 2100 50 0001 C CNN
F 3 "" H 9300 2100 50 0000 C CNN
1 9300 3300
1 0 0 -1
$EndComp
Text GLabel 1850 3100 0 60 UnSpc ~ 0
Vcc
Text GLabel 1850 3200 0 60 UnSpc ~ 0
Text GLabel 1850 2900 0 60 UnSpc ~ 0
5V
Text GLabel 1850 3000 0 60 UnSpc ~ 0
ADC1
Text GLabel 1850 3300 0 60 UnSpc ~ 0
Text GLabel 1850 3100 0 60 UnSpc ~ 0
ADC2
Text GLabel 1850 3400 0 60 UnSpc ~ 0
Text GLabel 2350 3000 2 60 UnSpc ~ 0
ADC3
Text GLabel 2350 3100 2 60 UnSpc ~ 0
Text GLabel 2350 2900 2 60 UnSpc ~ 0
GND
Text GLabel 2350 3200 2 60 UnSpc ~ 0
GND
Text GLabel 2350 3300 2 60 UnSpc ~ 0
DAC1
Text GLabel 2350 3400 2 60 UnSpc ~ 0
DAC2
$Comp
L CONN_02X09 P5
U 1 1 59490EE5
P 9650 2500
F 0 "P5" H 9650 3000 50 0000 C CNN
F 1 "CONN_02X09" V 9650 2500 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x09" H 9650 1300 50 0001 C CNN
F 3 "" H 9650 1300 50 0000 C CNN
1 9650 2500
L CONN_02X03 P2
U 1 1 594FAFF9
P 2100 3000
F 0 "P2" H 2100 3200 50 0000 C CNN
F 1 "CONN_02X03" H 2100 2800 50 0001 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x03" H 2100 1800 50 0001 C CNN
F 3 "" H 2100 1800 50 0000 C CNN
1 2100 3000
1 0 0 -1
$EndComp
Text GLabel 9400 2100 0 60 UnSpc ~ 0
VCC
Text GLabel 9400 2200 0 60 UnSpc ~ 0
GND
Text GLabel 9400 2300 0 60 UnSpc ~ 0
SPI_CLK
Text GLabel 9400 2400 0 60 UnSpc ~ 0
SPI_MISO
Text GLabel 9400 2500 0 60 UnSpc ~ 0
SPI_MOSI
Text GLabel 9400 2600 0 60 UnSpc ~ 0
SPI_CS
Text GLabel 9400 2700 0 60 UnSpc ~ 0
I2C_SCL
Text GLabel 9400 2800 0 60 UnSpc ~ 0
I2C_SDA
Text GLabel 9400 2900 0 60 UnSpc ~ 0
UART_TX
Text GLabel 9900 2100 2 60 UnSpc ~ 0
PWM1
Text GLabel 9900 2200 2 60 UnSpc ~ 0
PWM2
Text GLabel 9900 2300 2 60 UnSpc ~ 0
DAC1
Text GLabel 9900 2400 2 60 UnSpc ~ 0
DAC2
Text GLabel 9900 2500 2 60 UnSpc ~ 0
GPIO1
Text GLabel 9900 2600 2 60 UnSpc ~ 0
GPIO2
Text GLabel 9900 2700 2 60 UnSpc ~ 0
GPIO3
Text GLabel 9900 2800 2 60 UnSpc ~ 0
GPIO4
Text GLabel 9900 2900 2 60 UnSpc ~ 0
UART_TX
Text GLabel 2350 3100 2 60 UnSpc ~ 0
ADC4
$EndSCHEMATC

32
pcbs/backplane/myLibs/ch340g.lib
View File

@ -0,0 +1,32 @@
EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# CH340G
#
DEF CH340G U 0 40 Y Y 1 F N
F0 "U" 0 -500 60 H V C CNN
F1 "CH340G" 0 500 60 H V C CNN
F2 "" 200 -650 60 H V C CNN
F3 "" 200 -650 60 H V C CNN
DRAW
S -300 450 300 -450 0 1 0 N
X GND 1 -500 350 200 R 50 50 1 1 P
X TXD 2 -500 250 200 R 50 50 1 1 O
X RXD 3 -500 150 200 R 50 50 1 1 I
X V3 4 -500 50 200 R 50 50 1 1 P
X UD+ 5 -500 -50 200 R 50 50 1 1 B
X UD- 6 -500 -150 200 R 50 50 1 1 B
X XI 7 -500 -250 200 R 50 50 1 1 I
X XO 8 -500 -350 200 R 50 50 1 1 O
X CTS 9 500 -350 200 L 50 50 1 1 I I
X DSR 10 500 -250 200 L 50 50 1 1 I I
X RI 11 500 -150 200 L 50 50 1 1 I I
X DCD 12 500 -50 200 L 50 50 1 1 I I
X DTR 13 500 50 200 L 50 50 1 1 O I
X RTS 14 500 150 200 L 50 50 1 1 O I
X R232 15 500 250 200 L 50 50 1 1 I I
X VCC 16 500 350 200 L 50 50 1 1 P I
ENDDRAW
ENDDEF
#
#End Library

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